Analog Devices,inc.

Analog Devices Global Unlimited Company

Thomas Paul Kearney

Srivatsan Parthasarathy

Donal Bourke

Yukihisa Handa

Yuanzhong Zhou

Jean-Jacques Hajjar

Sirui Luo

Susan M Pratt

Jose M Vinau

Fault tolerant switches are provided herein. In certain embodiments, a fault tolerant switch includes a switch, a gate driver, and a clamp. The switch includes a switch p-type field effect transistor (PFET) and a switch n-type field effect transistor (NFET) electrically connected in series and controlled by the gate driver. Additionally, the clamp is electrically connected in parallel with the switch, and includes a forward protection circuit including a first diode and a first clamp FET in series, and a reverse protection circuit including a second diode and a second clamp FET in series. The clamp further includes a first gate bias circuit configured to bias a gate of the first clamp FET and a second gate bias circuit configured to bias a gate of the second clamp FET.

Fault tolerant low leakage switch

A touch screen controller has a converter that digitizes analog input as a function of an interference signal generated by an underlying touch screen device. To that end, the touch screen controller includes a set of inputs for receiving the noted interference signal from the touch screen device. The set of inputs also receives analog data from the touch screen device. The above noted converter, which is operatively coupled with the set of inputs, is capable of digitizing the analog data received from the touch screen device as a function of the interference signal.

Analog to digital converter controller

A programmable input voltage range analog-to-digital converter in which a split gate oxide process allows the use of high voltage (&#xb1;15 volt) switches on the same silicon substrate as standard sub-micron 5 volt CMOS devices. With this process, the analog input voltage can be sampled directly onto one or more sampling capacitors without the need for prior attenuation circuits. By only sampling on a given ratio of the sampling capacitors, the analog input can be scaled or attenuated to suit the dynamic range of a subsequent ADC. In the system of the present invention, the sampling capacitor can be the actual capacitive redistribution digital-to-analog converter (CapDAC) used in a SAR ADC itself, or a separate capacitor array. By selecting which bits of the CapDAC or separate sampling array to sample on, one can program the input range. Once the analog input signal has been attenuated to match the allowed dynamic range of the SAR converter, traditional SAR techniques can be used to convert the input signal to a digital word. Other conversion technologies, such as sigma-delta and pipeline, can also be used in conjunction with the inventive system.

Programmable input range ADC

A programmable input voltage range analog-to-digital converter in which a split gate oxide process allows the use of high voltage (&plusmn;15 volt) switches on the same silicon substrate as standard sub-micron 5 volt CMOS devices. With this process, the analog input voltage can be sampled directly onto one or more sampling capacitors without the need for prior attenuation circuits. By only sampling on a given ratio of the sampling capacitors, the analog input can be scaled or attenuated to suit the dynamic range of the SAR (successive approximation register) ADC itself. In the system of the present invention, the sampling capacitor can be the actual capacitive redistribution digital-to-analog converter (CapDAC) used in the SAR ADC itself, or a separate capacitor array. By selecting which bits of the CapDAC or separate sampling array to sample on, one can program the input range. Once the analog input signal has been attenuated to match the allowed dynamic range of the SAR converter, traditional SAR techniques can be used to convert the input signal to a digital word.

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Cork, Ireland

Thomas Paul Kearney