Fluke Corporation

John Fluke Mfg. Co., Inc.

Thomas P Locke

Tzafrir Sheffer

Robert J Lewandowski

Mark E Hinds

Matthew P Moore

An instrument and method for the troubleshooting and verification of copper-wire local area network (LAN) cable systems provides a series of resistance and capacitance measurements between all possible wire pairs using a pair of switch matrices and a software method for evaluating the measurements which are stored in a two-dimensional matrix. The stored measurements are evaluated against predetermined figures of merit and the decision pattern in matrix form is compared to that of a known good LAN cable system. Error messages responsive to mismatches are generated and presented to the operator via a user interface. Near-end cross talk (NEXT) isolation is evaluated using a mathematically calculated differential capacitance technique. Error messages are generated responsive to difference capacitance values larger than a figure of merit correlated to an acceptable level of NEXT isolation.

Instrument and method for testing local area network cables

A LAN cable identifier for testing and identifying copper-conductor LAN cables in conjunction with a LAN cable test instrument is provided. Series combinations of resistors and diodes allow for both resistance measurements and polarity determinations for selected pairs of conductors of the LAN cable. Resistance values are chosen to allow for identification of each combination in order to diagnose wiring errors and to identify the particular LAN cable identifier. In addition, capacitance measurements are accommodated with minimal contribution to measurement error by careful orientation of the resistors and diodes so that the diodes may be reverse biased by a d.c. bias voltage provided by the LAN cable test instrument. The reverse biased diode junctions contribute only a small amount of shunt capacitance to the measurement.

LAN cable identifier for testing local area network cables

A memory emulation test system is provided with a method of and system for fast functional testing of memories, such as boot ROMs, in microprocessor-based assemblies. The emulative test system includes a synchronization circuit which automatically re-arms itself and generates sync pulses on each and every UUT data access cycle to allow the UUT microprocessor to read every boot ROM memory location and collect data to be computed into a checksum or other signature to be compared with a predetermined signature representative of a correctly functioning and faultless boot ROM.

In a memory emulation test apparatus, a method of and system for fast

Addition of gated buffers which are accessible by the test apparatus microprocessor for receiving status information and the signals on some of the lines of the data bus of a microprocessor-based system under test provides the capacity for self testing, automatic calibration, improved diagnostics of a kernel at low levels of kernel operability and faster operation of the test system.

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Woodinville, WA, United States of America

Thomas P Locke