International Business Machines Corporation

Thomas-Michael Winkel

Andreas Huber

Roland Frech

Harald Huels

Bruce John Chamberlin

Erich Klink

Thomas Strach

Stefano Sergio Oggioni

Wiren Dale Becker

Hubert Harrer

Jochen Supper

Martin Eckert

Otto Andreas Torreiter

George A Katopis

Dierk Kaller

Claudio Siviero

Helmut Schettler

Thomas Ludwig

Wai Mon Ma

Ulrich Weiss

Gerald J Fahr

William Frederick Shutler

Bernd Garben

Simone Rehm

Andreas Rebmann

Helmut Virag

A system for manufacturing a product includes a mating connector connected to solder pins to provide an electrical conducting path, the solder pins being aligned against solder pads so that each solder pin is thermally and electrically connected to its corresponding solder pad by a solder paste bead. The system also includes a controller to adjust electrical resistive heating of a solder paste bead during a soldering process according to a temperature of the solder paste bead. A method of manufacturing a product includes aligning the solder pins against the solder pads, connecting the mating connector to the solder pins, and heating a solder paste bead by an electrical resistive heating, the solder paste bead undergoing a soldering process, where a temperature of the solder paste bead is being evaluated and the electrical resistive heating is adjusted according to the temperature of the solder paste bead.

Manufacturing a product using a soldering process

The invention relates to a method for embedding a discrete electronic device in a chip module. The chip module comprises a multilayer substrate which comprises a plurality of electrically conductive layers stacked above each other and an electrically non-conductive layer arranged between each pair of electrically conductive layers. The chip module is configured to receive one or more chips to be mounted onto a top surface thereof. Each electrically conductive layer comprises one or more electrically conductive structures. A recess is provided in a side surface of the chip module. The discrete electronic device is inserted into the recess. A first electrically conductive connection between a first electrical contact of the discrete electronic device and a first electrically conductive structure is established. Further, a second electrically conductive connection between a second electrical contact of the discrete electronic device and a second electrically conductive structure is established.

Discrete electronic device embedded in chip module

A method for embedding a discrete electrical device in a printed circuit board (PCB) is provided, which includes: providing a vertical via as a blind hole from a horizontal surface of the PCB to a conductive structure in a first layer, the first layer being one layer of a first core section of a plurality of core sections vertically arranged above each other, each core section including lower and upper conductive layers, and a non-conductive layer in between; inserting the electrical device into the via, with the device extending within at least two of the core sections; establishing a first electrical connection between a first device contact and the conductive structure in the first layer; and establishing a second electrical connection between a second device contact and a second layer, the second layer being one of the conductive layers of a second horizontal core section.

Method for embedding a discrete electrical device in a printed circuit board

Embedding a discrete electrical device in a printed circuit board (PCB) includes: providing a vertical via as a blind hole from a horizontal surface of the PCB to an electrically conductive structure in a first layer, the first layer being one layer of a first core section of a plurality of core sections vertically arranged above each other, each core section including lower and upper conductive layers, and a non-conductive layer in between; inserting the electrical device into the via, with the device extending within at least two of the core sections; establishing a first electrical connection between a first electrical device contact device and the electrically conductive structure in the first layer; and establishing a second electrical connection between a second electrical device contact and a second layer, the second layer being one of the electrically conductive layers of a second horizontal core section.

Embedding a discrete electrical device in a printed circuit board

A method for determining power consumption of a power domain within an integrated circuit is presented. In a first step, a local power supply impedance profile (Z(f)) of this power domain is determined. Subsequently, a local time-resolved power supply voltage (U(t)) is measured while a well-defined periodic activity is executed in power domain. A set of time-domain measured voltage data (U(t)) is thus accumulated and transformed into the frequency domain to yield a voltage spectrum (U(f)). A current spectrum I(t) is calculated from this voltage profile (U(f)) by using the power supply impedance profile Z(f) of this power domain as I(t)=F{U(f)/Z(f)}. Finally, a time-resolved power consumption spectrum P(t) is determined from measured voltage spectrum U(t)) and calculated current spectrum (I(t)). This power consumption (P(t)) may be compared with a reference (P(t)) to verify whether power consumption within power domain matches expectations.

Measuring power consumption in an integrated circuit

Manufacturing a product, wherein the product includes a first part and a second part, wherein the first part includes solder pins and the second part includes solder pads, wherein each of the solder pins has the matching solder pad, wherein each of the solder pads is covered by a matching solder paste bead. Aligning the solder pins against the solder pads in a way that each pair of the solder pin and the matching solder pad is thermally and electrically connected by the matching solder paste bead. Connecting a mating connector to the first part, wherein the mating connector is operable for providing a part of an electrical conducting path. Heating at least one of the solder paste beads by an electrical resistive heating, wherein the electrical resistive heating is generated by an electrical current flowing through the electrical conducting path.

Network power fault detection. At least one first network device is instructed to temporarily disconnect from a power supply path of a network, and at least one characteristic of the power supply path of the network is measured at a second network device connected to the network while the at least one first network device is temporarily disconnected from the network.

Network power fault detection

A method for determining a power supply impedance profile (|Z(f)|) at a predetermined load location within an electronic system. A repetitive activity (such as a modulated clock tree signal) is applied in the load location, and the local power supply voltage (U(t)) caused by this repetitive activity is measured. Rather than measuring the corresponding current consumption (I(t)) caused by the repetitive activity, the current consumption is calculated analytically. The local power supply impedance profile (|Z(f)|) is calculated as the ratio of the frequency-domain voltage and current consumption magnitudes (|U(f)|, |I(f)|) of the measured power supply voltage (U(t)) and the calculated current consumption (I(t)).

Method and system for impedance measurement in an integrated Circuit

A circuit arrangement comprising a set of signal layers, a set of first power layers, a set of second power layers, a set of signal vias, a set of first power vias, a set of second power vias, wherein a signal via of the set of signal vias provides a signal path for a high-frequency (HF) signal current, wherein at least a power via of the set of first power vias and at least a power via of the set of second power vias provide return paths for return currents associated with the signal current, wherein the return path provided by the power via of the set of second power vias is connected with a power layer of the set of second power layers, wherein at least one power layer of the set of first power layers is arranged between the power layer of the set of second power layers and each signal layer of the set of signal layers.

Noise reducing circuit arrangement

Printed wiring board (PWB) provides for reduction in pin counts required for power plane (including ground plane) connections and/or reduction in requirements for connector current handling per pin. Multiple collinear slots in the form of a dashed line are introduced in the metal layer implementing the power plane that alter the current distribution in the power plane and improve the strength of the PWB. The per-pin current profile for connector pins connected to the power plane is equalized by tuning the length of the slot(s). The slots are dashed and may be made internal to the power plane metal layer to avoid weakening the metal layer for laminated multi-layer PWBs and may be shaped around a connector end when the power plane pin allocation is not uniform at the connector ends. The resulting equalization reduces either pin count required for carrying the power plane current or reduces connector pin current requirements.

Apparatus for balancing power plane pin currents in a printed wiring board using collinear slots

The present invention relates to a measurement arrangement for determining the characteristic line parameters by measuring the S-parameters as a function of the frequency of transmission lines. A voltage mesh and a ground mesh in a metal layer are connected symmetrically to a reference ground (RG) in the layer at all ends.

Growing community of inventors

Schoenaich, Germany

Thomas-Michael Winkel