Infineon Technologies Ag

Siemens Aktiengesellschaft

Thomas Meister

Reinhard J Stengl

Herbert Schäfer

Martin Franosch

Josef Böck

Hans-Willi Meul

Helmut Klose

Rudolf Lachner

Herbert Schaefer

Josef Boeck

Martin Seck

Hermann Wendt

Wolfgang Klein

Herbert Sch&auml;fer

Wolfgang Liebl

Konrad Wolf

Josef B&ouml;ck

Andriy Romanyuk

Josef BÖCK

One embodiment of the present invention relates to method for the concurrent deposition of multiple different crystalline structures on a semiconductor body utilizing in-situ differential epitaxy. In one embodiment of the present invention a preparation surface is formed, resulting in two distinct crystalline regions, a monocrystalline silicon substrate region and an isolating layer region. A monocrystalline silicon layer and an amorphous silicon layer are concurrently formed directly onto the preparation surface in the monocrystalline silicon substrate region and the isolating layer region, respectively. Deposition comprises the formation of two or more sub-layers. The process parameters can be varied for each individual sub-layer to optimize deposition characteristics.

Process for the simultaneous deposition of crystalline and amorphous layers with doping

The disclosed invention provides a method for the fabrication of a bipolar transistor having a collector region comprised within a semiconductor body separated from an overlying base region by one or more isolation cavities (e.g., air gaps) filled with low permittivity gas. In particular, a multilayer base-collector dielectric film is deposited over the collector region. A base region is formed onto the multilayer dielectric film and is patterned to form one or more base connection regions. The multilayer dielectric film is selectively etched during a plurality of isotropic etch processes to allow for the formation of one or more isolation region between the base connection regions and the collector region, wherein the one or more isolation regions comprise cavities filled with a gas having a low dielectric constant (e.g., air). The resultant bipolar transistor has a reduced base-collector capacitance, thereby allowing for improved frequency properties (e.g., higher maximum frequency operation).

Bipolar transistor with base-collector-isolation without dielectric

A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

Method for fabricating a transistor structure

A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.

High-frequency bipolar transistor and method for the production thereof

High-frequency bipolar transistor

The silicon bipolar transistor () comprises a base, with a first highly-doped base layer () and a second poorly-doped base layer () which together form the base. The emitter is completely highly-doped and mounted directly on the second base layer ().

Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor

A method for fabricating a semiconductor including defining a first component region and a second component region in a semiconductor body is provided. A first epitaxial layer is formed through the first component region. A second epitaxial layer is formed over the first epitaxial layer, including configuring the physical dimensions of a first active zone of the first component region independent of a second active zone of the second component region via the first epitaxial layer and the second epitaxial layer. In one embodiment, the first component is a radio-frequency transistor and the second component is a varactor.

Method for fabricating a semiconductor structure

A bipolar transistor comprising a collector region of a first conduction type, and a subcollector region of the first conduction type at a first side of the collector region. The transistor further includes a base region of the second conduction type provided at a second side of the collector region, and an emitter region of the first conduction type which is provided above the base region on the side remote from the collection region. A carbon-doped semiconductor region is provided on the first side alongside the collector region. The bipolar transistor is characterized in that the carbon-doped semiconductor region has a carbon concentration of 10-10cmand the base region has a smaller cross section than the collector region and the collector region has, in the overlap region with the base region, a region having an increased doping compared with the remaining region. The carbon-doped semiconductor region prevents an outdiffusion from the zone of the collector region into the remaining region of the collector region.

Bipolar transistor comprising carbon-doped semiconductor

Method for producing a transistor structure

The invention relates to a method for producing a bipolar semiconductor element, especially a bipolar transistor, and a corresponding bipolar semiconductor component. The inventive method comprises the following steps: a first semiconductor area () of a first conductivity type (p) is provided above a semiconductor substrate (); a connecting area () of the first conductivity type (p&#x3c;+&#x3e;) is provided above the semiconductor area (); a first insulating area () is provided above the connecting area (); a window (F) is formed within the first insulating area () and the connecting area () so as to at least partly expose the semiconductor area (); a sidewall spacer () is provided in the window (F) in order to insulate the connecting area (); a second semiconductor area () of the second conductivity type (n+) is provided so as to cover the sidewall spacer () and a portion of the surrounding first insulating area (); the surrounding first insulating area () and the sidewall spacer () are removed in order to form a gap (LS) between the connecting area () and the second semiconductor area (); and the gap (LS) is sealed by means of a second insulating area () while a gaseous atmosphere or a vacuum atmosphere is provided inside the sealed gap (LS).

Method for the production of a bipolar semiconductor component, especially a bipolar transistor, and corresponding bipolar semiconductor component

A bipolar transistor and method of making a bipolar transistor is disclosed. In one embodiment, the bipolar transistor includes a polysilicon layer into which impurity atoms are inserted, thereby reducing the layer resistance.

Bipolar transistor

A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third layer is formed with an emitter cutout for an emitter. An undercut is formed in the second layer adjoining the base cutout. The base is at least partially located in the undercut. In order to obtain a low transition resistance between the lead and the base, an intermediate layer is provided between the first and the second layer. The intermediate layer is selectively etchable with respect to the second layer. At least in the region of the undercut between the lead and the base, a base connection zone is provided that can be adjusted independent of other production conditions. The intermediate layer is removed in a contact region with the base.

The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first conductivity type, which is embedded therein and is bare towards the top. A monocrystalline base area is provided and a base-connecting area of the second conductivity type is provided above the base area. An insulating area is provided above the base-connecting area and a window is formed in the insulating area and the base-connecting area so as to at least partly expose the base area. An insulating sidewall spacer is provided in the window in order to insulate the base-connecting area. An emitter layer which forms a monocrystalline emitter area above the base area and a polycrystalline emitter area above the insulating area and the sidewall spacer is differentially deposited and structured, and a tempering step is carried out.

Growing community of inventors

Taufkirchen, Germany

Thomas Meister