Empire Technology Development LLC

Thomas Martin Conte

Andrew Wolfe

William Henry Mangione-Smith

Bill Mangione-Smith

Techniques are generally described for mapping a thread onto heterogeneous processor cores. Example techniques may include associating the thread with one or more predefined execution characteristics, assigning the thread to one or more heterogeneous processor cores based on the one or more predefined execution characteristics, and/or executing the thread by the respective assigned heterogeneous processor cores.

Mapping thread phases onto heterogeneous cores based on execution characteristics and cache line eviction counts

Techniques described herein generally relate to multi-core processors including two or more processor cores. Example embodiments may set forth devices, methods, and computer programs related to calculating a clock rate for one or more of the processor cores in the multi-core processor. One example method may include determining a first estimated workload for a first processor core and a second estimated workload for a second processor core within a scheduling interval in a periodic scheduling environment. In addition, a first clock rate for the first processor core may be calculated based on one or more of the first estimated workload, a maximum clock rate supported by the multi-core processor and/or the scheduling interval. Similarly, a second clock rate for the second processor core may also be calculated based on one or more of the second estimated workload, the maximum clock rate, and/or the scheduling interval.

Processor core clock rate selection

Examples of sensing a human touch to a touch screen and providing tactile and visual feedback are disclosed.

Touch screen with tactile feedback

An operating system sandbox may include an operating system isolation module configured to restrict an operating system from transmitting machine-readable data and/or machine-readable instructions to an application, based on at least one predefined rule corresponding to abnormal operating system behavior.

Operating system sandbox

A data center management system may include a processor coupled to a network. The network may be further coupled to a primary data center and a secondary data center located at a physical location remote from the primary data center. The processor may be adapted to execute computer implemented instructions to determine a first transition point for the primary data center with respect to a secondary data center on the basis of one or more financial indicators, transfer one or more data center tasks from the primary data center to the secondary data center at substantially the first transition point, and execute the one or more transferred data center tasks at the secondary data center.

Data centers task mapping

Techniques are generally described for a multi-core processor with a plurality of processor cores. At least one cache is accessible to at least two of the plurality of processor cores. The multi-core processor can be configured for separately allocating a memory space within the cache to the individual processor cores accessing the cache.

Allocation of memory space to individual processor cores

Techniques for thread mapping in multi-core processors are disclosed. An example computing system is disclosed having a multi-core processor with a plurality of processor cores. A performance counter may be configured to collect data relating to the performance of the multi-core processor. A core controller may be configured to map threads of execution to the processor cores based at least in part on the data collected by the performance counter.

Thread-to-core mapping based on thread deadline, thread demand, and hardware characteristics data collected by a performance counter

Techniques described herein generally relate to methods, data processing devices and computer readable media to ensure that data stored in a remote backing storage device are in encrypted form before that data is transferred to another device or over a network. In some examples, the methods, data processing devices and computer readable media may be arranged to encrypt the data passed to the network when the data stored in the backing storage device is in unencrypted form. Also disclosed are methods, data processing devices and computer readable media that identify when the data stored in the backing storage device is in unencrypted form, including methods that may detect that the data may appear to be in encrypted form as a result of the data being compressed.

Securing backing storage data passed through a network

Techniques are generally described for an image capture system that may include an image sensor, a flash for providing illumination, a data storage, and a processor operatively associated with the data storage. The processor may be adapted to execute computer implemented instructions to pre-store one or more image capture device characteristics in the data storage, acquire data in a pre-capture phase, model shadow effects based on either or both of the pre-stored data and the acquired data, modify one or more image capture device settings based on the modeled shadow effects, and record image data with the image sensor. Illumination may be provided substantially coincident with recording of the image data.

Camera flash mitigation

Encryption techniques for securing data in a data cache are generally disclosed. Example methods may include one or more of reading the cache to identify data, determining whether the data is encrypted to identify previously unencrypted data and/or previously encrypted data, and encrypting selectively at least a portion of the previously unencrypted data. The present disclosure also generally relates to a computer system data processor configured to read a cache to identify data, determine whether the read data is encrypted, and encrypt selectively at least a portion of the previously unencrypted data. The present disclosure also generally relates to computer accessible mediums containing computer-executable instructions for data encryption upon execution of the instructions by a data processor. The instructions may configure the data processor to perform procedures that read the cache to identify data, determine whether the data is encrypted, and selectively encrypt data determined as unencrypted.

Securing data caches through encryption

A health sensing device is described for placement on a user. The device may include a sensor, a filter, and a transmitter. The sensor is configured to sense one or more factors relating to an indicator of a health related condition or occurrence. The filter is configured to evaluate a signal from the sensor and determine if the indicator has been detected. The transmitter is arranged for initiating a transmission based on a signal from the filter. The sensor can include one or more microphone devices, accelerometers, and/or MEMS devices. A method of monitoring a user for a health related condition is also described.

Microphone for remote health sensing

Techniques are generally described for allocating a thread to heterogeneous processor cores. Example techniques may include monitoring real time computing data related to the heterogeneous processor cores processing the thread, allocating the thread to the heterogeneous processor cores based, at least in part, on the real time computing data, and/or executing the thread by the respective allocated heterogeneous processor core.

Allocating threads to cores based on threads falling behind thread completion target deadline

A health sensing device is described for placement on a user. The device may include a sensor, a filter, and a transmitter. The sensor is configured to sense one or more factors relating to an indicator of a health related condition or occurrence. The filter is configured to evaluate a signal from the sensor and determine if the indicator has been detected. The transmitter is arranged for initiating a transmission based on a signal from the filter. The sensor can include one or more microphone devices, accelerometers, and/or MEMs devices. A method of monitoring a user for a health related condition is also described.

Sudden infant death prevention clothing

Implementations related to power reduction in physical layer wireless communications are disclosed.

Power reduction in physical layer wireless communications

The present disclosure relates to a system for routing data across a multicore processing network. The system includes a multicore processing array having a plurality of processing cores, a memory for storing data relating to an object being modeled, the data being associated with coordinate information relating to the object within a coordinate system, and a controller for routing the data from the memory to one or more of the plurality of processing cores of the multicore processing array based on the coordinate information associated with the data. The present disclosure also relates to a method for routing data across a multicore processing network and a computer accessible medium having stored thereon computer executable instructions for performing a procedure for routing data across a multicore processing network.

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Atlanta, GA, United States of America

Thomas Martin Conte