Compaq Computer Corporation, Inc.

Other

Texas Instruments Corporation

Thomas M Albers

Paul B Wood

Mark W Welker

John V Eberst

Richard L Pyra

Jack E Bresenham

Darwin Fontenot

Stephen B Preston

Michael A Denio

Douglas C Crawford

Wood, Paul B

A restraint for an animal in the form of a collar that is capable of closely conforming to the skeletal structure of the animal at a number of different locations in order to limit physical movement of the head of the animal. The restraint collar includes a body having an upper member adapted to be situated below a jaw of the animal in a region of an upper portion of the animal's neck, and a lower member adapted to be situated in a region of a lower portion of the animal's neck. The body upper member includes a jaw guide located between two upper member crests and having a portion extending downwardly and below the crest towards the lower member. It is adapted to be situated at a central area of the animal's neck. The crests are adapted to fit below the sides of the animal's jaw to provide for a desired restraint.

Animal collar for limiting head movement

A graphics processor uses a line draw facility to receive first and second values indicative of the coordinates of respective first and second end points of a line. The reception of the second value is sensed by the line draw facility and line data is generated responsive to the sensing of the second value.

Video graphics controller with high speed line draw processor

A graphics device includes first and second endpoint memories where coordinates of a line can be stored. State logic within the graphics device calculates line parameters from the first and second endpoints. The calculated line parameters include a line error term which can be stored in an error term memory. The error term memory is writeable from a source external to the graphics device, such as the CPU of a computer system, so that the external source can modify the contents of the error term register.

Video graphics controller with improved calculation capabilities

Video graphics controller with automatic starting for line draws

Line draw circuitry receives parameters defining first and second endpoints of a line and calculates line parameters based on the first and second endpoints. The line parameters are then stored in a memory. A 'calculate-only' control signals determines whether a line is drawn immediately after calculation (and storing) of the end parameters or whether the line is drawn responsive to a subsequent 'start' signal. If the line is to be drawn responsive to the start signal, the line parameters may be modified prior to drawing the line.

A graphics subsystem, including a video digital-to-analog converter, is disclosed. A high speed oscillator generates a pixel clock signal at the frequency at which pixels are to be displayed. Included in the video DAC is a frequency divider which presents an output clock signal having a period which is a multiple of the pixel clock signal, the multiple corresponding to the level of multiplexing of pixel data to be provided by the video DAC; this multiple can equal unity. The video controller in the system receives the output clock signal, and generates clock signals to control the serial port of the frame memory, and also to control the latching of the first stage in the video DAC. The first stage latch in the video DAC latches in the multiple pixel data from the frame memory, and the multiplexer in the video DAC presents the data to the color palette RAM, or around the color palette RAM in true-color non-multiplexed mode, according to the pixel clock signal. Highlighted pixels in a cursor are displayed by inverting the output of the color palette RAM at cursor locations, for example by way of an exclusive-OR function of the color palette RAM output and a bit corresponding to the comparison of the display location and the desired cursor location. Inversion of the output of the color palette RAM results in higher contrast pixels within the cursor.

Circuitry and method for high visibility cursor generation in a graphics

Circuitry for drawing lines includes a video memory for storing pixel data and circuitry for generating a sequence of addresses defining a line of pixels in the video memory. A first memory stores a sequence of pattern units corresponding to the generated sequence of addresses. A second memory stores a value indicating a current pattern unit. Writing circuitry writes to the video memory at a generated address responsive to a current pattern unit. A third memory stores a control value which is accessed by update circuitry for updating the second memory to indicate the next pattern unit. The update circuitry may selectively update the second memory to the sequential pattern unit or reset the second memory to a predetermined pattern unit.

Video graphics controller with selectable pattern features for line draws

A method of partitioning a software program, so that a main program may be executed on a first processor, and at least one designated function may be executed on a second processor. The subprogram to be executed by the second processor is selected from a main program associated with a first processor and identified globally to both processors. The subprogram is given a call from the main program that creates a software environment that is compatible to both processors. More specifically, the method entails creating an argument passing means, via the function call, so that relevant information about the subprogram parameters may be communicated to the second processor.

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Houston, TX, United States of America

Thomas M Albers