Convex Computer Corporation

Hewlett-packard Development Company, L.P.

Hewlett-packard Company

Thomas Lee Watson

Tony M Brewer

David M Chastain

Kenneth Mark Wilson

Robert Bruce Aglietti

A computer system with mechanisms for avoiding mapping conflicts in a translation look-aside buffer. A memory manager in the computer system allocates a virtual address to a process by determining a set of previously allocated virtual addresses for the process and selecting the virtual address such that the mapping of the virtual address to the translation look-aside buffer does not conflict with any of the previously allocated virtual addresses.

Avoiding mapping conflicts in a translation look-aside buffer

There is disclosed a shared multiprocessing system with several nodes, or processing units, interconnected together for communication purposes by a dual channeled crossbar switch. Several such multichannel crossbar switches can be linked together to form a large cohesive processing system where processing units from one node can access memory from another node on the same crossbar or from another node on a different crossbar. The interconnection between crossbars is accomplished by a circular ring. In operation, the system allows for long memory latencies while not increasing the length of short (local) memory latencies. This is, accomplished by storing the bulk of long latency requests at the local processing unit and only sending the request when there is an actual availability of communication capacity to handle the long latency request.

Parallel processing computer system having shared coherent memory and

There is disclosed a shared multiprocessing system with several nodes, or processing units, interconnected together for communication purposes by a dual channeled crossbar switch. Several such multichannel crossbar switches can be linked together to form a large cohesive processing system where processing units from one node can access memory from another node on the same crossbar or from another node on a different crossbar. The interconnection between crossbars is accomplished by a circular ring. In operation, the system allows for long memory latencies while not increasing the length of short (local) memory latencies. This is accomplished by storing the bulk of long latency requests at the local processing unit and only sending the request when there is an actual availability of communication capacity to handle the long latency request.

Parallel processing computer system interconnections utilizing

A processing system 100 is provided which includes first and second hypernodes 101, each of the hypernodes 101 having at least first and second coherent interfaces 106. At least first and second interconnect network 107 are provided, the first network 107 coupling the first interfaces 106 of the first and second hypernodes 101 and the second interconnect network 107 coupling the second interfaces 106 of the first and second hypernodes 101.

Growing community of inventors

Dallas, TX, United States of America

Thomas Lee Watson