Rohde and Schwarz Gmbh & Co. Kg

Thomas Kuhwald

Markus Freidhof

Bernhard Nitsch

Andrew Schaefer

Wolfgang Herbordt

Friedrich Reich

Johann Huber

Thomas Valten

Werner Held

Michael Reinhold

Andreas Ziegler

Michael Grimm

Sebastian Petzsch

Ruben Villarino-Villa

Markus Breunig

Detlef Schlager

Jens Naumann

Ruben Villarino Villa

Florian Janku

Rubén Villarino-Villa

The present invention provides to a processing of data samples by an arrangement comprising a signal processing chip for executing predetermined operations and a processor for executing any kind of software code. In particular, it is not only possible that the general purpose processor, which executes the software code can process results from the signal processing chip, but also the signal processing chip can receive the results of the general purpose processor for applying further operations. In this way, the flexibility and efficiency of the processing can be further improved.

Device and method for processing data samples

The present disclosure provides a main measurement device for simultaneously measuring signals with at least one secondary measurement device, the main measurement device comprising a reference signal output port configured to couple to the at least one secondary measurement device, a reference signal generator coupled to the reference signal output port and configured to generate a reference signal, a measurement port configured to receive a signal to be measured, a trigger output port configured to couple to a trigger input port of the at least one secondary measurement device and to output a trigger signal, and a controllably switchable internal signal path configured to selectively couple the reference signal generator with the measurement port. Further, the present invention discloses a respective secondary measurement device, a respective measurement system, and a respective method.

Main measurement device, secondary measurement device, measurement system and method

A signal analyzer for analyzing a signal includes a frontend with at least two interleaved digitizers configured to digitize an input signal, thereby generating a digitized input signal. The signal analyzer also includes a first interleave alignment filter established by a hardware interleave alignment filter that is configured to hardware-compensate non-ideal effects of the frontend in the digitized input signal in real-time, thereby generating a hardware-compensated, digitized input signal. Further, the signal analyzer includes an acquisition memory configured to store the hardware-compensated, digitized input signal, thereby acquiring an acquired signal. Moreover, the signal analyzer includes a second interleave alignment filter configured to fine-compensate further non-ideal effects of the frontend in a post-processing of the acquired signal.

Signal analyzer and method of analyzing a signal

A method for measuring at least one signal with a digital oscilloscope according to the invention acquires sampled values of the at least one signal in individual time ranges which are each defined in relation to a trigger time of a trigger event, which is detected in the at least one signal in each case by the digital oscilloscope. A post-processing of the sampled values acquired in each case in the individual time ranges then takes place. According to the invention, the acquisition and the post-processing are implemented in parallel.

Digital oscilloscope and a method with parallel acquisition and signal post-processing

The equalization filter implements an equalization of at least one signal distorted by a measurement setup. The filter coefficients of the equalization filter can be determined by minimizing a cost function K in which only sequences of filter coefficients which exert significant influence on the equalization are taken into consideration.

Method for equalising distorted signals and an associated equalisation filter

The invention relates to a measuring device for measuring a high-frequency signal and a method for correcting a high-frequency signal superposed with measurement errors by means of the measuring device. The measurement is a time-domain measurement in real-time. The measuring device provides a measurement-signal input, an analog digital converter and a processing unit, wherein the measurement-signal input is connected to a device under test in order to measure the high-frequency signal. According to the invention a deembedding unit is arranged in the signal path of the measuring device between analog-digital converter and the processing unit in order to compensate measurement errors resulting from the connection of devices under test and measuring devices.

Measuring device and a method for measuring a high-frequency signal with deembedding

A device for the automatic adjustment of a gain and/or attenuation factor of several amplification or attenuation elements connected in a cascade comprises respectively a detector for measuring a signal level of a signal disposed at the input of the respective amplification or attenuation element and respectively a downstream control unit for determining the gain and/or attenuation factor respectively associated with each amplification or attenuation element. The control unit is a forward control unit for determining the gain and/or attenuation factor respectively associated with each amplification or attenuation element dependent upon the measured signal level of the signal disposed at the input of each amplification or attenuation element.

Devices for automatic adjustment of gain and attenuation factors

A method for marking a signal edge, which has been removed from at least one decimated binary signal after the decimation of an associated binary signal, within the decimated binary signal, establishes successive signal portions of the respective binary signal, in each case with a number of sampled values corresponding to a decimation factor of the decimation. It detects a signal edge removed through decimation from each signal portion if the number of signal edges determined in each signal portion of the respective binary signal is greater than one. Then, the sampled values of the respective decimated binary signal are determined through decimation of the sampled values of the associated binary signal with the decimation factor, and the removed signal edge at the sampling time of the decimated binary signal which corresponds to the signal portion of the associated binary signal with the signal edge removed through decimation is marked.

Method and a device for preventing signal-edge losses

A device for fixing a gain or attenuation factor for a gain or attenuation element during a transmission of a sequence of synchronization-data symbols registers the signal level of a received signal at the input of the gain or attenuation element. It then identifies the start of transmission of the sequence of synchronization-data symbols on the basis of the signal level of the registered, received signal and signals the time interval for the fixing of the gain or attenuation factor starting with the identified start of transmission of the sequence of synchronization-data symbols.

Device and a method for fixing a gain or attenuation factor

A measuring device for the measurement of differential signals including a real-time portion, which contains two probes, a signal adder and a triggering device. The probes each record a partial signal of a differential signal. The signal adder adds the partial signals to form a differential signal. The triggering device implements a triggering on the basis of the differential signal.

Measuring machine and measuring method for measuring differential signals

A method for the recovery of a clock signal from a data signal, wherein the edges of the data signal and the clock signal are each presented by an ordered sequence of timing points, comprising determining missing edges in the sequence of data-signal edges, inserting new data-signal edges (D) into the sequence of data-signal edges to obtain a completed sequence of data-signal edges, and recovering the clock signal from the completed sequence of data-signal edges. The detection of missing edges in the sequence of data-signal edges is based on a prediction of the clock signal (FRONT CLOCK).

Method and device for clock data recovery

A method for digital triggering of a digital recording of a digitized measurement signal having a superimposed noise signal. The method includes generating from the digitized measurement signal a digital triggering signal for the digital triggering of the digital recording of the measurement signal, and performing band-limitation of the noise signal superimposed on the digitized measurement signal via a low-pass filtering before the digital triggering signal is generated. The bandwidth of the low-pass filtering is adjusted dependent upon edge steepness of the measurement signal, in order to reduce variance &#x3c3;in jitter of the digital triggering signal.

Method and device for digital triggering of a measurement signal having a superimposed noise signal

In an system for representing a signal on a display device, the signal is fed to a first sampling device and, time-displaced via a time-delay device, is fed at least to a second sampling device for sampling. The sampling values of the first sampled signal and the sampling values of the second sampled signal are appropriately ordered in a first memory control device of a first component connected to the first sampling device in order to compensate a time-delay of the sampling values of the second sampled signal caused by the time-delay device, and are passed to a post-treatment device provided in the first component and connected to the display device.

System and method for processing and representing a sampled signal

A method for the recovery of a clock signal from a data signal is provided where the edges of the signals are each represented as a chronologically-ordered sequence of timing points. In one procedural stage, a plurality of timing points of the data signal are processed in parallel as follows: resolving the timing points of the data signal by a nominal clock pulse; estimating the bit-period deviations for the adjusted timing points; and injecting the nominal clock pulse to the estimated bit-period deviations.

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Markt Schwaben, Germany

Thomas Kuhwald