Infineon Technologies Ag

Infineon Technologies Austria Ag

Thomas Krotscheck Ostermann

Markus Zundel

Thomas Grille

Andrew Christopher Graeme Wood

Peter Irsigler

Bernhard Jakoby

Peter Maier Brandl

Ursula Hedenig

Dirk Ahlers

Stefan Mieslinger

Kurt Matoy

Ventsislav M Lavchiev

Andreas Peter Meiser

Gerhard Prechtl

Adrian Finney

Thomas Popp

Dietmar Kotz

Erwin Bacher

Gerald Stocker

Marius Aurel Bodea

Ulf Bartl

Gernot Fasching

Elmar Aschauer

Christoph Kovatsch

Stefan Clara

Radu Eugen Cazimirovici

Jens Peter Konrath

Thomas Aichinger

Norbert Krischke

Thomas Christian Neidhart

Stefan Krivec

Jochen Hilsenbeck

Michael Sorger

Sven Lanzerstorfer

Sokratis Sgouridis

Andreas Tortschanoff

Clemens Roessler

Cristina Consani

Christian Ranacher

Johanna Elisabeth Roessler

Nicola Vannucci

Mathias Racki

Norbert Rieser

Gerald Puehringer

Siegfried Schmid

Anatoly Sotnikov

Ventsislav Lachiev

Christian Westermeier

Boris Mayerhofer

Walter Slamnig

Sabine Gruber

An integrated circuit includes a semiconductor substrate, first and second doping regions in the substrate, a first insulating layer on a first surface of the semiconductor substrate, the first insulating layer having first and second openings above the first and second doping regions, a polysilicon layer on the first insulating layer, the polysilicon layer having first and second openings above the first and second openings of the first insulating layer, a second insulating layer on the polysilicon layer and having first and second openings above the first and second openings of the polysilicon layer, a first contact element disposed in the first openings, a second contact element disposed in the second openings, the first and second contact elements being in contact with the first and second doping regions.

Integrated circuit and bipolar transistor

A device for controlling trapped ions includes a substrate. An electrode structure is disposed on the substrate, the electrode structure including DC electrodes and RF electrodes of an ion trap configured to trap ions in a space above the substrate. A first device terminal is disposed on the substrate, the first device terminal being connected via a first electrode connection line to a specific DC electrode. Further, a second device terminal is disposed on the substrate, the second device terminal being connected via a second electrode connection line to the specific DC electrode.

Device for controlling trapped ions having an electrode circuitry configured for device testing

A fluid sensor includes a support structure having a top main surface region; a thermal emitter on the top main surface region of the support structure; a thermal radiation detector on the top main surface region of the support structure; and a waveguide structure having a first and a second waveguide section on the top main surface region of the support structure. The first waveguide section guides a first portion of the thermal radiation to the thermal radiation detector and the second waveguide section guides a second portion of the thermal radiation to the thermal radiation detector. The waveguide structure enables an interaction of an evanescence field of the guided first and/or second portion of the thermal radiation with a surrounding fluid.

Sensor and method for detecting guided thermal radiation

A fluid sensor for performing a reference measurement includes a support structure having a top main surface region; a thermal emitter on the top main surface region of the support structure; a first waveguide section and a first thermal radiation detector on the top main surface region of the support structure; and a cover structure on at least one part of the first waveguide section. The first waveguide section guides a first portion of the thermal radiation emitted by the thermal emitter to the first thermal radiation detector. The first thermal radiation detector detects the guided first portion of the thermal radiation for performing the reference measurement.

Sensor and method for performing a reference measurement with guided thermal radiation

According to an embodiment of a semiconductor device, the semiconductor device includes: a first active cell area comprising a first plurality of parallel gate trenches; a second active cell area comprising a second plurality of parallel gate trenches; and a metallization layer above the first and the second active cell areas. The metallization layer includes: a first part contacting a semiconductor mesa region between the plurality of parallel gate trenches in the first and the second active cell areas; and a second part surrounding the first part. The second part of the metallization layer contacts the first plurality of gate trenches along a first direction and the second plurality of gate trenches along a second direction different from the first direction.

Gate contact structure for semiconductor device

A fluid sensor includes a substrate having a top main surface region, wherein the top main surface region of the substrate forms a common system plane of the fluid sensor, a thermal radiation emitter on the top main surface region of the substrate, an optical filter structure on the top main surface region of the substrate, a waveguide on the main top surface region of the substrate, and a thermal radiation detector on the top main surface region of the substrate, wherein the thermal radiation detector provides a detector output signal based on a radiation strength of the filtered thermal radiation received from the waveguide.

Fluid sensor including an optical filter and a waveguide, and method for manufacturing the fluid sensor

Semiconductor device with multi-branch gate contact structure

A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor. A method of producing the semiconductor device is also described.

Semiconductor device including an integrated resistor and method of producing thereof

A semiconductor wafer having a main surface and a rear surface opposite from the main surface is provided. A die singulation preparation step is performed in kerf regions of the semiconductor wafer. The kerf regions enclose a plurality of die sites. The die singulation preparation step includes forming one or more preliminary kerf trenches between at least two immediately adjacent die sites. The method further includes forming active semiconductor devices in the die sites, and singulating the semiconductor wafer in the kerf regions thereby providing a plurality of discrete semiconductor dies from the die sites. The one or more preliminary kerf trenches are unfilled during the singulating, and the singulating includes removing semiconductor material from a surface of the semiconductor wafer that is between opposite facing sidewalls of the one or more preliminary kerf trenches.

Preliminary trenches formed in kerf regions for die singulation

A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.

Semiconductor device including an integrated resistor

In one embodiment, a semiconductor device includes a first contact pad disposed at a top side of a workpiece, a second contact pad disposed at the top side of the workpiece. An isolation region is disposed between the first contact pad and the second contact pad. A metal strip is disposed at least partially within the isolation region. The metal strip is not coupled to an external potential node.

Semiconductor devices and methods of formation thereof

A semiconductor device comprises a plurality of quantum structures comprising predominantly germanium. The plurality of quantum structures are formed on a first semiconductor layer structure. The quantum structures of the plurality of quantum structures have a lateral dimension of less than 15 nm and an area density of at least 8&#xd7;10quantum structures per cm. The plurality of quantum structures are configured to emit light with a light emission maximum at a wavelength of between 2 &#x3bc;m and 10 &#x3bc;m or to absorb light with a light absorption maximum at a wavelength of between 2 &#x3bc;m and 10 &#x3bc;m.

Semiconductor devices, a fluid sensor and a method for forming a semiconductor device

An apparatus for analyzing ion kinetics in a dielectric probe structure includes an ion reservoir abutting the dielectric probe structure and configured to supply mobile ions to the dielectric probe structure, a capacitor structure configured to generate an electric field in the dielectric probe structure along a vertical direction, and an electrode structure configured to generate an electrophoretic force on mobile ions in the dielectric probe structure along a lateral direction. A method for analyzing ion kinetics in the dielectric probe structure of the apparatus is also provided.

Apparatus for analyzing ion kinetics in dielectrics

A semiconductor device includes a plurality of trenches extending into a semiconductor substrate. Each trench comprises a plurality of enlarged width regions distributed along the trench. At least one electrically conductive trench structure is located in each trench. The semiconductor device comprises an electrically insulating layer arranged between the semiconductor substrate and an electrode structure. The semiconductor device comprises a vertical electrically conductive structure extending through the electrically insulating layer. The vertical electrically conductive structure forms an electrically connection between the electrode structure and an electrically conductive trench structure located in a first trench of at a first enlarged width region. The electrically insulating layer is arranged between a second enlarged width region of the plurality of enlarged width regions of the first trench and an electrode structure above the second enlarged width region without any vertical electrical connections through the electrically insulating layer at the second enlarged width region.

Semiconductor device having trenches with enlarged width regions

A semiconductor device includes a guard structure located laterally between a first active area of a semiconductor substrate and a second active area of the semiconductor substrate. The guard structure includes a first doping region located at a front side surface of the semiconductor substrate, and a wiring structure electrically connecting the first doping region to a highly doped portion of a common doping region. The common doping region extends from a backside surface of the semiconductor substrate to at least a part of the front side surface of the semiconductor substrate in contact with the wiring structure of the guard structure. Corresponding methods for forming the semiconductor device are also described.

Semiconductor device with a guard structure and corresponding methods of manufacture

Growing community of inventors

Koestenberg, Austria

Thomas Krotscheck Ostermann