Infineon Technologies Ag

Thomas Kilger

Dominic Maier

Ulrich Wachter

Franz-Xaver Muehlbauer

Gottfried Beer

Claus Waechter

Christian Geissler

Maciej Wojnowski

Stefan Paulus

Bernhard Rieder

Johannes Lodermeyer

Urs Elrod

Christiane Brunner

Veronika Huber

Ralf Otremba

Horst Theuss

Alfons Dehe

Saverio Trotta

Klaus Schiess

Georg Meyer-Berg

Ashutosh Baheti

Uwe Wahl

Bernd Goller

Chau Fatt Chiang

Chee Yang Ng

Daniel Porwol

Bernd Stadler

Markus Menath

Matthias Steiert

Juergen Wagner

Martin Richard Niessner

Beng Keh See

Walter Hartner

Ngoc-Hoa Huynh

Francesca Arcioni

Andreas Schlögl

Franz Xaver Muehlbauer

A semiconductor apparatus comprises: a circuit board; a semiconductor package having a main surface, wherein the semiconductor package is arranged on the circuit board and the main surface faces the circuit board; a radio-frequency line element of the semiconductor package, which radio-frequency line element is arranged on the main surface or inside the semiconductor package, wherein the radio-frequency line element is designed to transmit a signal at a frequency of greater than 10 GHz; and an underfiller material arranged between the circuit board and the semiconductor package, wherein the radio-frequency line element and the underfiller material do not overlap in an orthogonal projection onto the main surface.

Semiconductor apparatuses with radio-frequency line elements, and associated manufacturing methods

A radar chip package includes a radar monolithic microwave integrated circuit (MMIC) having a backside, a frontside arranged opposite to the backside, and lateral sides that extend between the backside and the frontside, wherein the radar MIMIC comprises a recess that extends from the backside at least partially towards the frontside; a plurality of electrical interfaces coupled to the frontside of the radar MIMIC; at least one antenna arranged at the frontside of the radar MIMIC; and a lens formed over the recess and the at least one antenna, wherein the lens is coupled to the backside of the radar MMIC.

Radar package with optical lens for radar waves

A radio-frequency device comprises a radio-frequency chip, a first connecting element arranged over a chip surface of the radio-frequency chip, the first connecting element being designed to mechanically and electrically connect the radio-frequency chip to a circuit board, and a radio-frequency signal carrying element arranged over the chip surface and electrically coupled to the radio-frequency chip, the radio-frequency signal carrying element being covered by an electrically nonconductive material and being designed to transmit a signal in a direction parallel to the chip surface, wherein the first connecting element and the radio-frequency signal carrying element are arranged at a same level in relation to a direction perpendicular to the chip surface, and wherein the first connecting element is spaced apart from the radio-frequency signal carrying element by way of a region that is free of the electrically nonconductive material.

Radio-frequency device with radio-frequency signal carrying element and associated production method

A semiconductor device includes a semiconductor chip and a redistribution layer on a first side of the semiconductor chip. The redistribution layer is electrically coupled to the semiconductor chip. The semiconductor device includes a dielectric layer and an antenna on the dielectric layer. The dielectric layer is between the antenna and the semiconductor chip.

Semiconductor device including an antenna

A method of forming a chip arrangement is provided. The method includes: arranging a plurality of stacks on a carrier, each stack including a thinned semiconductor chip, a further layer, and a polymer layer between the further layer and the chip, each stack being arranged with the chip facing the carrier; joining the plurality of stacks with each other with an encapsulation material to form the chip arrangement; exposing the further layer; and forming a redistribution layer contacting the chips of the chip arrangement.

Method of forming a chip arrangement, chip arrangement, method of forming a chip package, and chip package

A semiconductor device having a lid, and method of making a semiconductor device having a lid is disclosed. The semiconductor device includes a substrate. A device is positioned at the substrate. A lid made of a semiconductor material is positioned over the device to form a protective cavity about the device. The lid is formed using a semiconductor process. In other examples, the lid may be made of a nonconductive material, such as a polymer material. The lids may be formed as part of a batch process.

Semiconductor device including a cavity lid

A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.

Semiconductor package with a through port for sensor applications

A system and method of manufacturing a system are disclosed. An embodiment of the system includes a first packaged component comprising a first component and a first redistribution layer (RDL) disposed on a first main surface of the first packaged component, wherein the first RDL includes first pads. The system further includes a second packaged component having a second component disposed at a first main surface of the second packaged component, the first main surface having second pads and a connection layer between the first packaged component and the second packaged component, wherein the connection layer connects a first plurality of the first pads with the second pads.

Integrated system and method of making the integrated system

A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.

Chip package and a method of producing the same

Integrated circuits are packaged by placing a plurality of semiconductor dies on a support substrate, each one of the semiconductor dies having a plurality of terminals at a side facing the support substrate and covering the semiconductor dies with a molding compound to form a molded structure. The support substrate is then removed from the molded structure to expose the side of the semiconductor dies with the terminals, and a metal redistribution layer is formed on the molded structure and in direct contact with the terminals of the semiconductor dies and the molding compound. The redistribution layer is formed without first forming a dielectric layer on a side of the molded structure with the terminals of the semiconductor dies. A corresponding molded substrate and individual molded semiconductor packages are also disclosed.

Method of packaging integrated circuits

A semiconductor device includes a microelectromechanical system (MEMS) die, an encapsulation material, a via element, a non-conductive lid, and a conductive layer. The encapsulation material laterally surrounds the MEMS die. The via element extends through the encapsulation material. The non-conductive lid is over the MEMS die and defines a cavity. The conductive layer is over the MEMS die and the encapsulation material and is electrically coupled to the via element.

Semiconductor device including a MEMS die and a conductive layer

According to various embodiments, a package arrangement may include: a first encapsulation material; at least one electronic circuit at least partially embedded in the first encapsulation material, the at least one electronic circuit including a first contact pad structure at a first side of the at least one electronic circuit; at least one electromechanical device disposed over the first side of the at least one electronic circuit, the at least one electromechanical device including a second contact pad structure facing the first side of the at least one electronic circuit; a redistribution layer structure between the at least one electromechanical device and the at least one electronic circuit, the redistribution layer structure electrically connecting the first contact pad structure with the second contact pad structure, wherein a gap is provided between the at least one electromechanical device and the redistribution layer structure; a second encapsulation material at least partially covering the at least one electromechanical device, wherein the gap is free of the second encapsulation material.

Package arrangement, a package, and a method of manufacturing a package arrangement

A method of packaging integrated circuits includes providing a molded substrate that has a plurality of first semiconductor dies and a plurality of second semiconductor dies laterally spaced apart from one another and covered by a molding compound. The molding compound is thinned to expose at least some of the second semiconductor dies. The exposed second semiconductor dies are removed to form cavities in the molded substrate. A plurality of third semiconductor dies are inserted in the cavities formed in the molded substrate, and electrical connections are formed to the first semiconductor dies and to the third semiconductor dies.

Method of packaging integrated circuits and a molded package

Metal redistribution layer for molded substrates

Growing community of inventors

Regenstauf, Germany

Thomas Kilger