Infineon Technologies Ag

Thomas Künemund

Winfried Kamp

Heinz Söldner

Holger Sedlak

Joel Hatsch

Siegmar Köppe

Noel Hatsch

Michel D'Argouges

The present invention provides a CAM (content addressable memory) apparatus having: a first memory device () with a word line input (WL) and at least one storage node () for storing a first bit of a data word; a second memory device () with a word line input (WL) and at least one storage node () for storing a second bit of a data word; and a comparator device () for comparing the first and second stored bits with two precoded comparison bits fed via four inputs () and for driving a hit node () in the event of the first stored bit corresponding to the first comparison bit and the second stored bit corresponding to the second comparison bit.

CAM (content addressable memory) apparatus

One embodiment provides a content addressable memory cell having a first memory cell which is electrically connected to a comparator unit. The comparator unit is constructed from at least eight transistors, at least four transistors being arranged in a first circuit part and at least four transistors being arranged in a second circuit part and each of the circuit parts having at least two circuit branches.

Content addressable memory cell

Growing community of inventors

Munich, Germany

Thomas Künemund