Microchip Technology Inc.

Vitesse Semiconductor Corporation

Microsemi Communications, Inc.

Microsemi Storage Solutions, Inc.

IP Gem Group, LLC

Thomas Joergensen

Brian Branscomb

Kristian Ehlers

Lars Ellegaard

Morten Terstrup

Lars Ellegard

A system for network data transactions, the system including an ingress port to receive data frames and timestamp received data frames, a frame analyzer to forward the data frames to a processor, the processor to extract timing information from the data frames and update the data frames based on updated timing calculations and output updated data frames via one or more egress ports. Data frames are timestamped at ingress and egress ports, and egress timestamps are saved in a timestamp memory. The system reduces overall network delays by using dedicated hardware and stored timestamp information.

System and methods for network data processing

A PHY chip for a synchronous Ethernet system includes N network input/output (I/O) ports, a first external recovered clock input, a first recovered clock output, and a first clock multiplexer having a plurality of data inputs, a select input, and an output coupled to the first recovered clock output, at least one of the data inputs coupled to a first recovered clock from a respective one of the N network I/O ports, a first additional data input coupled to the first external recovered clock input.

Daisy-chained synchronous ethernet clock recovery

A PHY constituted of: a clock arranged to generate a time signal indicative of the current time; and an egress stamp functionality arranged to: receive a data packet on the egress side, extract data from a predetermined section of the received data packet, and responsive to the extracted data, perform one of a plurality of predetermined timestamp operations, the plurality of predetermined timestamp operations comprising: generating a timestamp signal responsive to the generated time signal; not generating a timestamp signal; or modifying a timestamp written in the received data packet.

Indirect packet classification timestamping system and method

A phase predictor to accurately detect and predict the phase relationship between two clocks running at different frequencies. The phase relationship can be used to record the transmission and reception times of Ethernet frames transmitted over a transmission medium with very high accuracy.

Phase predictor and associated method of use

A transparent clock converter is interposed between a non-precision time protocol (non-PTP) enabled network node and other portions of the network. The transparent clock converter effectively converts the non-PTP node into a transparent clock node. In some embodiments the transparent clock converter includes physical layer devices, but not media access controllers.

PTP transparent clock system upgrade solution

A transparent clock may be provided between edge nodes of a non-precision time protocol network, with an arrival time of a packet at an edge of the non-precision time protocol network carried in a reserved field of a packet.

Network distributed packet-based synchronization

Precision Timing Protocol (PTP) related functions for use in packet communications carried in part by a microwave communications link include setting of time of day values across the microwave link and providing transparent clock functions. The PTP functions may be used for synchronizing radio base stations in a cellular network. The transparent clock can bridge Ethernet switches associated with microwave stations providing the microwave communications link.

Timing synchronization for networks with radio links

A system and method for measuring a propagation delay in a point to multipoint network. The system includes a central timing module which provides a timing signal to a plurality of line cards. Each of the line cards includes a local clock that is frequency locked to a 1588 clock and is configured to generate a return timing signal to the central timing module after a predetermined number of clock cycles. The central timing module measures the propagation delay based on the clock cycles of the local clock counted before the return signal is generated and the period of the local clock.

Delay measurement in a point to multipoint system

A system handles timing information within a packet-switched network. The system classifies packets for processing depending on the packet type. After classification, a new timestamp value may be produced depending on the packet classification. The new timestamp value may use a timestamp value from the received packet, a value from a local clock, and an offset value. The timestamp value may be written into the packet, depending on the packet classification, and checksum-type fields may additionally be updated in the packet. In some embodiments, multiple physical layer circuits are integrated with a local clock circuit.

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Soeborg, Denmark

Thomas Joergensen