Vtc Inc.

Seagate Technology Incorporated

Thomas J Skaar

William W Leake

Anthony Leigh Priborsky

Eric J Behnke

Scott Younger

Apparatus and method for supplying electrical power to a device. A system on chip (SOC) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (AOD) power island having a power control block with an energy detector coupled to a host input line. First and second power supply modules respectively supply power to the first and second regions. The second power supply module includes a main switch between the first power supply module and a host input voltage terminal. The power control block opens the main switch to enter a low power mode during which no power is supplied to the first region, and the power control block closes the main switch to resume application of power to the first region responsive to the energy detector detecting electrical energy on the host input line.

PHY based wake up from low power mode operation

A data separator which extracts data embedded in a read signal includes a delay circuit that is controlled by a frequency synthesizer. The frequency synthesizer provides a write clock during write operations. A controlled oscillator included in the frequency synthesizer resides on a common integrated circuit with the delay circuit. Because component fabrication variations tend to track on a common integrated circuit, the frequency synthesizer compensates for fabrication variations in the delay circuit, thereby producing an accurate delay interval.

Data separator having an accurate delay circuit

A data separator for use in extracting data from a read signal includes a restart circuit. The data separator is comprised of a controlled oscillator, a delay circuit, a restart circuit, a phase detector and a data extractor. The delay circuit delays the read signal by an interval approximately equal to the time required to start the controlled oscillator after assertion of the start signal. Accordingly, the oscillator starts in-phase with the delayed read signal. In one embodiment of the present invention, the delay interval of the delay circuit is controlled by a frequency synthesizer which generates a write clock during write operations.

Growing community of inventors

Eagan, MN, United States of America

Thomas J Skaar