Intel Corporation

Thomas J De Bonis

Robert L Sankman

Sairam Agraharam

Guotao Wang

Shengquan Ou

Todd Spencer

Yang Sun

Carl L Deppisch

Edward Rudolph Prack

Ashay A Dani

Anna M Prakash

Mukul P Renavikar

Rajen S Sidhu

Lilia May

Srinivasa R Aravamudhan

Jason Jieping Zhang

James C Matayabas

Chang Lin

Omkar G Karhade

Nitin A Deshpande

Robert M Nickerson

Mitul Bharat Modi

Christopher L Rumer

Zhimin Wan

Sri Chaitra J Chavali

Haifa Hariri

Nazmiye Acikgoz Akbay

Fadi Y Hafez

An electronic device may include a first die that may include a first set of die contacts. The electronic device may include a second die that may include a second set of die contacts. The electronic device may include a bridge interconnect that may include a first set of bridge contacts and may include a second set of bridge contacts. The first set of bridge contacts may be directly coupled to the first set of die contacts (e.g., with an interconnecting material, such as solder). The second set of bridge contacts may be directly coupled to the second set of die contacts (e.g., with solder). The bridge interconnect may help facilitate electrical communication between the first die and the second die.

Multi-chip packaging

The present disclosure is directed to systems and methods for improving heat distribution and heat removal efficiency in PoP semiconductor packages. A PoP semiconductor package includes a first semiconductor package that is physically, communicably, and conductively coupled to a stacked second semiconductor package. A thermally conductive member that includes at least one thermally conductive member may be disposed between the first semiconductor package and the second semiconductor package. The thermally conductive member may include: a single thermally conductive element; multiple thermally conductive elements; or a core that includes at least one thermally conductive element. The thermally conductive elements are thermally conductively coupled to an upper surface of the first semiconductor package and to the lower surface of the second semiconductor package to facilitate the transfer of heat from the first semiconductor package to the second semiconductor package.

Thermally coupled package-on-package semiconductor packages

An apparatus is described that includes a substrate and a mold compound disposed on the substrate. The semiconductor die is embedded within the mold compound and is electrically coupled to lands on the substrate. Solder balls are disposed around the semiconductor die on the substrate. Each of the solder balls have a solid coating thereon. The solid coating contains a cleaning agent to promote its solder ball's coalescence with another solder ball. Respective vias are formed in the mold compound that expose the solder balls and their respective solid coatings. In combined or alternate embodiments outer edges of the mold compound have smaller thickness than regions of the mold compound between the vias and the semiconductor die. In combined or alternate embodiments micro-channels exist between the solder balls and the mold compound.

Package structure to enhance yield of TMI interconnections

Growing community of inventors

Tempe, AZ, United States of America

Thomas J De Bonis