Micronas Gmbh

Deutsche Itt Industries Gmbh

Thomas Hilpert

Stefan Mueller

Matthias Vierthaler

Carsten Noeske

Martin Winterer

Heinrich Pfeifer

Juergen Becher

Sonke Mehrgardt

Wilfried W Gehrig

A technique of decoding a biphase signal comprises sampling the biphase signal to obtain phase sample values and sampling the biphase signal to obtain magnitude sample values. A first digital signal is derived from the phase sample values and associated bit combinations are formed from the first digital signal. A decision is made whether the bit combination is an erroneous bit combination, and a probability check is performed to obtain probability values that decide which parts of the erroneous bit combination are true and which are false. A corrected bit combination is generated from the obtained probability values, and a second digital signal is generated whose data states are formed from the valid bit combination and, in the presence of an erroneous bit combination, from the corrected bit combination.

Apparatus and method and decoding biphase signals

Audio source selection circuit (QW) for an audio signal processor with inputs for source signals (F, F, NA, NB) provided by at least one source (Q, Q), with a processing device (V) which forms pairs of signals from the source signals, with a settable source selection logic (Qs) to which the channels of the processing device (V) are applied, and with outputs coupled to signal outputs of the settable source selection logic (Qs) and each forming an output channel (Co, Co, Co), the processing device (V) including an automatic audio mode setting device which generates suitable intermediate channels (Cz, Cz, Cz, Cz) from the source signals (F, F, NA, NB) according to a source- and application-related mode.

Audio source selection circuit

A technique of decoding erroneous biphase signals is disclosed comprising the following steps. First, phase and magnitude sample values (ps, bs) are formed, from which a first digital signal (d) is derived. From this, associated bit combinations (StStStp) are determined, and a decision is made as to whether the respective bit combination (StStStp) is a valid combination (SgSgSgp) or an erroneous one (SfSfSfp). Probability values (SwSwSwp) are determined that decide which parts of the erroneous bit combination (SfSfSfp) are probably true and/or which are probably false. Next, a corrected bit combination (SkSkSkp) is formed from the existing information. Finally, a second digital signal (d) is generated as an output signal, whose data states are formed either from the valid bit combination (SgSgSgp) or from the corrected bit combination (SkSkSkp).

Method for decoding biphase signals

An integrated circuit for decoding an analog audio signal includes a tuner that receives the analog audio signal and provides a sound intercarrier frequency signal. A digital demodulator receives and digitizes the sound intercarrier frequency signal to provide a digitized sound intercarrier frequency signal, and digitally demodulates the digitized sound intercarrier frequency signal to provide a digitized multichannel television sound (MTS) demodulated signal. A digital broadcast television system committee (BTSC) compatible decoder receives and decodes the digitized multichannel television sound (MTS) demodulated signal, and provides a summed (L&plus;R) audio output signal and a difference (L&minus;R) audio output signal.

Method and circuit for decoding an analog audio signal using the BTSC standard

Circuit for decoding an analog audio signal

A circuit for decoding additional information in a composite signal, the circuit having a filter device for separating a signal range in the composite signal, which includes the additional information in coded form. An adaptive decoding device is controlled by a signal quality parameter which is determined in an additional circuit from the respective reception state of the composite signal.

Circuit for decoding additional information in a composite signal

A method utilizing a predetermined set of instructions in a wait routine reduces spurious signals caused by the power consumption of processors, particularly digital signal processors, which is dependent on the instruction code being executed. These spurious signals occur, for example, in processors performing cyclically recurring program routines which are initiated by interrupts where, during the run time of the routines, a first mean power consumption results, and where the run time of the program routines is shorter than the time between two successive interrupts. The cyclic changes in power consumption caused by this mode of operation of the digital signal processor are avoided by performing a wait routine between successive program routines which includes instructions selected to cause a mean power consumption of the processor during the wait routine to correspond to that during the program routines.

Method of reducing noise signals caused by fluctuations in power

Apparatus and method for frequency-tuning the frequency-modulated sound carriers of multichannel sound transmission signals in a satellite television receiver. By utilizing digital signal processing, the audio range of the television satellite channel is searched for the desired sound carrier in steps. Then the FM center frequency is determined by calculating the average amplitude density in each measurement interval.

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Denzlingen, Germany

Thomas Hilpert