Nvidia Corporation

Rambus Inc.

Other

Thomas Hastings Greer

William James Dally

John Wood Poulton

Brian S Leibowitz

Hae-Chang Lee

Jade M Kizer

Akash Bansal

Carl Thomas Gray

Brucek Kurdo Khailany

Robert E Palmer

Sudhir Shrikantha Kudva

Jonah Matthew Alben

David Patrick Luebke

Josef Bo Spjut

Philip Chadwick

A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI.

High-speed signaling systems and methods with adaptable, continuous-time equalization

Perceived clarity of an image presented by a display can be improved using an image stabilization technique to stabilize the image relative to a user's retina. During an illumination period, stabilization actuators are controlled to move a display panel or adjust optical components in the path of light associated with the image to shift the location of the image on the user's retina in response to head or eye movement detected by the system. In some embodiments, a display is configured to illuminate an image, and at least one stabilization actuator is configured to stabilize the image in a retina space associated with a user. Changes in the retina space can be detected by one or more sensors configured to detect a head position of the user and/or an orientation of the user's retina. The image is stabilized in retina space using the stabilization actuators.

Retina space display stabilization and a foveated display for augmented reality

A system and method are provided for controlling a modified buck converter circuit. A pull-up switching mechanism that is coupled to an upstream terminal of an inductor within a modified buck converter circuit is enabled. A load current at the output of the modified buck regulator circuit is measured. A capacitor current associated with a capacitor that is coupled to a downstream terminal of the inductor is continuously sensed and the pull-up switching mechanism is disabled when the capacitor current is greater than a sum of the load current and an enabling current value.

Variable frequency soft-switching control of a buck converter

A magnetic power supply coupling system is disclosed. An integrated circuit module includes an integrated circuit die and a secondary winding that is configured to generate an induced, alternating current based on a magnetic flux. A primary winding is external to the integrated circuit module, proximate to the integrated circuit module, and coupled to a main power supply corresponding to an alternating current that generates the magnetic flux. The induced, alternating current is converted into a direct current at a voltage level to supply power to the integrated circuit die.

Magnetic power coupling to an integrated circuit module

A method, computer readable medium, and system generate a low-latency image for display. The method includes the steps of receiving a portion of an image for display, selecting a pulse-width value for displaying the portion of the image, and driving a display device to present the portion of the image using a pulse-width value and pulse density modulation value. Logic circuits for implementing the method may be included in a graphics processing unit or within a display device. The portion of the image for display may be rendered based on real-time position information associated with a head-mounted display.

Low-latency display

One embodiment of the present invention sets forth a mechanism for transmitting and receiving differential signals. A transmitter combines a direct current (DC) to DC converter including a capacitor with a 2:1 multiplexer to drive a pair of differential signaling lines. The transmitter drives a pair of voltages that are symmetric about the ground power supply level. Signaling currents are returned to the ground plane to minimize the generation of noise that is a source of crosstalk between different differential signaling pairs. Noise introduced through the power supply is correlated with the switching rate of the data and may be reduced using an equalizer circuit.

Data-driven charge-pump transmitter for differential signaling

A system is provided for transmitting signals. The system comprises a first processing unit, a cache memory, and a package. The first processing unit comprises a first ground-referenced single-ended signaling (GRS) interface circuit and the second processing unit comprises a second GRS interface circuit. The cache memory comprises a third and a fourth GRS interface circuit. The package comprises one or more electrical traces that couple the first GRS interface to the third GRS interface and couple the second GRS interface to the fourth GRS interface, where the first GRS interface circuit, the second GRS interface, the third GRS interface, and the fourth GRS interface circuit are each configured to transmit a pulse along one trace of the one or more electrical traces by discharging a capacitor between the one trace and a ground network.

Ground-referenced single-ended memory interconnect

A system of interconnected chips comprising a multi-chip module (MCM) includes a processor chip, a system functions chip, and an MCM package configured to include the processor chip, the system functions chip, and an interconnect circuit. The processor chip is configured to include a first ground-referenced single-ended signaling interface circuit. A first set of electrical traces manufactured within the MCM package and configured to couple the first single-ended signaling interface circuit to the interconnect circuit. The system functions chip is configured to include a second single-ended signaling interface circuit and a host interface. A second set of electrical traces manufactured within the MCM package and configured to couple the host interface to at least one external pin of the MCM package. In one embodiment, each single-ended signaling interface advantageously implements ground-referenced single-ended signaling.

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module

A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a system function chip, and an MCM package configured to include the first processor chip and the system function chip. The first processor chip is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. The system function chip is configured to include a second GRS interface circuit. A first set of electrical traces are fabricated within the MCM package and coupled to the first GRS interface circuit and to the second GRS interface circuit. The first GRS interface circuit and second GRS interface circuit together provide a communication channel between the first processor chip and the system function chip.

Growing community of inventors

Chapel Hill, NC, United States of America

Thomas Hastings Greer