Qimonda Ag

Infineon Technologies Ag

Qimonda North America Corporation

International Business Machines Corporation

Macronix International Co., Ltd.

Giesecke+devrient Currency Technology Gmbh

Bengbu Design & Research Institute for Glass Industry

Other

Saint-gobain Glass France

Giesecke & Devrient Gmbh

Infineon Technologies North America Corp.

Thomas Happ

Jan Boris Philipp

Hsiang-Lan Lung

Thomas Nirschl

Ulrike Gruening-von Schwerin

Matthew Joseph Breitwisch

Bipin Rajendran

Michael Kund

Cay-Uwe Pinnow

Min Yang

Ralf Symanczyk

Rolf Weis

Eric Andrew Joseph

Shoaib Hasan Zaidi

Bernhard Ruf

Petra Majewski

Chung H Lam

Alejandro Gabriel Schrott

Peter Baars

Stefan Tegen

Yi-Chou Chen

Wolfgang Rauscher

Klaus Muemmler

Shih Hung Chen

Stephan Pohlner

Dieter Andres

Zaidi Shoaib

Ming-Hsiu Lee

Thomas Giering

Thomas Roehr

Mark C Lamorey

Johann Kecht

Simone Raoux

Chieh-Fang Chen

Ming-Hsiang Hsueh

Stefan Jost

Martin Stark

Martin Clara

Thomas Dalibor

Chia Hua Ho

Jörg Palm

Erich Kerst

Roland Dietmüller

Christian Rüster

Lothar Risch

Franz Kreupl

Gerhard Mueller

Geoffrey W Burr

Heinz Hoenigschmid

Harald Seidl

Martin Gutsche

Hsiang Lan Lung

Christoph Ludwig

Andreas Walter

Klaus-Dieter Ufert

Joerg Palm

Yi Chou Chen

Chieh Fang Chen

Klaus Aufinger

Renate Bergmann

Ulrike Gruening-Von Schwerin

Igor Kasko

Shihhung Chen

Thomas Nirshl

Hsiang-Lang Lung

GillYong Lee

Jan Boris Philip

A method for testing a value document having a luminescence feature involves guiding the value document past a test sensor in a transport direction. A scanning sequence occurs that repeats itself multiple times upon guiding the value document past the test sensor. The method involves irradiating a test region of the test sensor such that the test radiation is arranged to be remitted by the value document at least partially in a detection spectral range of the test sensor. Excitation radiation is arranged to cause an emission radiation of the luminescence feature in the detection spectral range. The method further involves scanning at least one location-dependent remission spectral value in the test region in the first irradiation phase, irradiating the test region only with the excitation radiation in a second irradiation phase, and scanning at least one location-dependent emission spectral value in the test region after the first irradiation phase.

Checking the authenticity of value documents

The present invention relates to a method, a sensor, a sensor unit and a bank-note processing machine for checking the completeness and/or authenticity of value documents. A value document comprises at least one machine-readable feature substance in at the least two locations. According to the method, the value document is excited at least locally at measuring locations. Furthermore, a feature intensity with respect to the machine-readable feature substance is captured location-resolved at several different locations of the value document. The location-based feature intensities are classified location-based with the help of a threshold value. Furthermore, location-based limits of a location distribution to be expected of the machine-readable feature substance are determined. Finally, a location-based distribution of the classified feature intensities is assessed.

Completeness check of a value document

The invention relates to an apparatus and a method for checking value documents marked with feature substances, and to the corresponding feature substances. The feature substances are detected on the basis of Raman or SERS spectroscopy also at high transport speeds with a spatial resolution in the low millimeter region or better and reliably identified.

Device and method for verifying feature substances

The present invention relates to a layer system () for thin-film solar cells () and solar modules, comprising

Layer system for thin-film solar cells

A frameless solar module having a carrier substrate and a top layer connected thereto, between which there is a layer structure which forms a plurality of solar cells connected in series for the photovoltaic generation of power is described. The carrier substrate and/or the top layer of the frameless solar module is/are provided with mounting holes for mounting the solar module on a module bracket or for connection to at least one further solar module. The mounting holes are produced in a coating-free zone within a photovoltaically active region. Mounting arrangements having such a solar module which contain fixing elements which pass through the mounting holes are also described. Furthermore, a method for producing such a solar module in which the mounting holes are produced in the carrier substrate and/or in the top layer is also described.

Frameless solar module with mounting holes

The present invention relates to a layer system () for thin-film solar cells with an absorber layer () that contains a chalcogenide compound semiconductor and a buffer layer () that is arranged on the absorber layer (), wherein the buffer layer () contains NaInSClwith 0.05&#x2266;x&#x3c;0.2 or 0.2&#x3c;x&#x2266;0.5, 1&#x2266;y&#x2266;2, and 0.6&#x2266;x/z &#x2266;1.4.

[object Object]

The invention relates to a device for depositing a layer made of at least two components on an object, with a deposition chamber for disposing the object, at least one source with material to be deposited, as well as at least one device for controlling the deposition process, implemented such that the concentration of at least one component of the material to be deposited can be modified in its gas phase prior to deposition on the substrate by selective binding of a specified quantity of the at least one component, wherein the selectively bound quantity of the at least one component can be controlled by modifying at least one control parameter that is actively coupled to a binding rate or the component. It further relates to a device for depositing a layer made of at least two components on an object, wherein a device for controlling the deposition process has at least one gettering element made of a reactive material, wherein the reactive material includes copper and/or molybdenum. It further relates to a method for depositing a layer made of at least two components on an object, wherein a selectively bound quantity of at least one component is controlled by modifying a binding rate of a device for controlling the deposition process.

Device and method for precipitating a layer on a substrate

An integrated circuit includes a substrate including isolation regions, a first conductive line formed in the substrate between isolation regions, and a vertical diode formed in the substrate. The integrated circuit includes a contact coupled to the vertical diode and a memory element coupled to the contact. The first conductive line provides a portion of the vertical diode.

Integrated circuit including vertical diode

A memory cell includes a first electrode, a second electrode, a layer of phase change material extending from a first contact with the first electrode to a second contact with the second electrode, and a sidewall spacer contacting the second electrode and a sidewall of the layer of phase change material adjacent to the second contact.

Integrated circuit including sidewall spacer

An integrated circuit includes a first SONOS memory cell and a second SONOS memory cell. The second memory cell is stacked on the first memory cell.

Stacked SONOS memory

An integrated circuit includes a memory cell with a resistance changing memory element. The resistance changing memory element includes a first electrode, a second electrode, and a resistivity changing material disposed between the first and second electrodes, where the resistivity changing material is configured to change resistive states in response to application of a voltage or current to the first and second electrodes. In addition, at least one of the first electrode and the second electrode comprises an insulator material including a self-assembled electrically conductive element formed within the insulator material. The self-assembled electrically conductive element formed within the insulator material remains stable throughout the operation of switching the resistivity changing material to different resistive states.

Resistive memory devices with improved resistive changing elements

The present invention, in one embodiment, provides a method of producing a PN junction the method including at least the steps of providing a Si-containing substrate; forming an insulating layer on the Si-containing substrate; forming a via through the insulating layer to expose at least a portion of the Si-containing substrate; forming a seed layer of the exposed portion of the Si containing substrate; forming amorphous Si on at least the seed layer; converting at least a portion of the amorphous Si to provide crystalline Si; and forming a first dopant region abutting a second dopant region in the crystalline Si.

Method for fabrication of crystalline diodes for resistive memories

An integrated circuit includes: a resistive memory having an array of resistive memory cells; a memory controller that controls operation of the resistive memory in accordance with external commands from an external device; and a memory scheduler coupled to the resistive memory and to the memory controller. The memory scheduler schedules internal maintenance operations within the resistive memory in response to trigger conditions indicated by at least one sensor signal or external command. The operation of the memory scheduler and performance of the internal maintenance operations are transparent to the external device and, optionally, transparent to the memory controller.

Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger condition

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Tarrytown, NY, United States of America

Thomas Happ