Infineon Technologies Ag

Infineon Technologies Dresden Gmbh & Co . Kg

Thomas Gross

Dietrich Bonart

Hermann Gruber

Andreas Peter Meiser

Walter Hartner

Bernhard Weidgans

Johann Gatterbauer

Markus Zundel

Martina Heigl

Martina Debie

Franz Hirler

Rolf Weis

Till Schloesser

Andrea Logiudice

Adolfo De Cicco

Detlef Weber

Rosario Chiodo

Franziska Haering

Mathias Von Borcke

Markus Rochel

Hans Joachim Schulze

Werner Irlbacher

This disclosure includes systems, methods, and techniques for controlling a plurality of light-emitting diodes (LEDs). For example, a circuit includes a switching device, where the switching device is electrically connected to an LED of the plurality of LEDs, and where the switching device is configured to control whether the LED receives an electrical signal from a power source. Additionally, the circuit includes processing circuitry configured to receive a photocurrent signal indicative of a photocurrent value corresponding to the LED, compare the photocurrent value with a threshold photocurrent value, and control, based on the comparison of the photocurrent value with the threshold photocurrent value, an output current of the LED.

Controlling LED intensity based on a detected photocurrent value

A semiconductor wafer includes a semiconductor substrate having a plurality of die areas separated from one another by dicing areas. Each die area includes one or more metal layers above the semiconductor substrate and a plurality of fuse structures formed in at least one of the one or more metal layers. Each fuse structure includes a fuse area between first and second fuse heads. Each die area also includes a first pair of contacts connected to different areas of the first fuse head of at least some of the fuse structures. The wafer can be singulated along the dicing areas into individual dies. A corresponding method of fuse verification is also provided.

Electrically-verifiable fuses and method of fuse verification

A method includes: forming first and second trenches in a semiconductor body; forming a first material layer on the semiconductor body in the first and second trenches such that a first residual trench remains in the first trench and a second residual trench remains in the second trench; removing the first material from the second trench; and forming a second material layer on the first material layer in the first residual trench and on the semiconductor body in the second trench. The first material layer includes dopants of a first doping type and the second material layer includes dopants of a second doping type. The method further includes diffusing dopants from the first material layer in the first trench into the semiconductor body to form a first doped region, and from the second material layer in the second trench into the semiconductor body to form a second doped region.

Method for forming complementary doped semiconductor regions in a semiconductor body

A semiconductor device includes an active region disposed in a semiconductor substrate and an uppermost metal level including metal lines, where the uppermost metal level is disposed over the semiconductor substrate. Contact pads are disposed at a major surface of the semiconductor device, where the contact pads are coupled to the metal lines in the uppermost metal level. An isolation region separates the contact pads disposed at the major surface. Adjacent contact pads are electrically isolated from one another by a portion of the isolation region. Reflective structures are disposed between the upper metal level and the contact pads, where each of the reflective structures that is directly over the active region completely overlaps an associated portion of the isolation region separating the contact pad.

Semiconductor devices for integration with light emitting chips and modules thereof

According to various embodiments, a method may include: forming a first layer on a surface using a first lift-off process; forming a second layer over the first layer using a second lift-off process; wherein the second lift-off process is configured such that the second layer covers at least one sidewall of the first layer at least partially.

Semiconductor chip device

A method for producing a polysilicon resistor device may include: forming a polysilicon layer; implanting first dopant atoms into at least a portion of the polysilicon layer, wherein the first dopant atoms include deep energy level donors; implanting second dopant atoms into said at least a portion of said polysilicon layer; and annealing said at least a portion of said polysilicon layer.

Methods for producing polysilicon resistors

Methods for making a semiconductor chip device

A method for producing a semiconductor component with a semiconductor body includes providing a substrate of a first conductivity type. A buried semiconductor layer of a second conductivity type is provided on the substrate. A functional unit semiconductor layer is provided on the buried semiconductor layer. At least one trench, which reaches into the substrate, is formed in the semiconductor body. An insulating layer is formed, which covers inner walls of the trench and electrically insulates the trench interior from the functional unit semiconductor layer and the buried semiconductor layer, the insulating layer having at least one opening in the region of the trench bottom. The at least one trench is filled with an electrically conductive semiconductor material of the first conductivity type, wherein the electrically conductive semiconductor material forms an electrical contact from a surface of the semiconductor body to the substrate.

Semiconductor component and methods for producing a semiconductor component

A semiconductor device includes a semiconductor substrate having a first side and a second side opposite the first side, an active area and a through contact area, the active area including a transistor structure having a control electrode, the through contact area including a semiconductor mesa having insulated sidewalls. The semiconductor device further includes a first metallization on the first side in the active area and a recess extending from the first side into the semiconductor substrate and between the active area and the through contact area and including in the through contact area a horizontally widening portion, the recess being at least partly filled with a conductive material forming a first conductive region in ohmic contact with the semiconductor mesa and the transistor structure. The semiconductor device also includes a control metallization on the second side and in ohmic contact with the semiconductor mesa.

Semiconductor device having a through contact

According to an embodiment, a method of forming a semiconductor device includes: providing a wafer having a semiconductor substrate with a first side a second side opposite the first side, and a dielectric region arranged on the first side; mounting the wafer with the first side on a carrier system; etching a deep vertical trench from the second side through the semiconductor substrate to the dielectric region, thereby insulating a mesa region from the remaining semiconductor substrate; and filling the deep vertical trench with a dielectric material.

Semiconductor device having a through contact and a manufacturing method therefor

A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

Growing community of inventors

Sinzing, Germany

Thomas Gross