Delco Electronics Corporation

Delphi Technologies, Inc.

Landis+gyr, Inc.

Thomas Gerard Block

Gregory J Manlove

Detlef Griessman

Seyed R Zarabadi

Richard A Kennedy

Mark Russell Keyse

Matt E Kraus

Gordon Phillip Howlett

A circuit for use in a switched mode power supply comprising includes an integrated circuit, a transformer, a capacitor, a low voltage circuit and a current limiting resistor. The IC jitters the switching frequency of the switch based on a bias voltage of the integrated circuit. The IC also includes a current source configured to supply current for operation of the switching regulator when insufficient current is available from the bias input pin. The transformer includes primary, secondary and auxiliary windings. The primary winding receives a rectified line voltage and is coupled to the switch. The capacitor is coupled between the bias input pin and ground. The low voltage circuit is coupled to the auxiliary winding, and provides current to the bias input pin. The current limiting resistor limits current produced by the low voltage circuit to less than that required for operation of the IC.

Method and apparatus for offline switch mode power supply with dithered switching frequency

A battery monitor system for determining a cell voltage between a low side contact and a high side contact of a cell in situ as one of a plurality of cells connected in series to form a battery. The system uses an arrangement of switches and capacitors to shift relatively high absolute voltages of a battery stack to a relative low voltage level so lower voltage electronics can be used to monitor cell voltages. The system may be configured to provide a single ended measurement or a differential measurement indicative of a cell voltage. The differential measurement may be advantageous to correct or offset signal noise caused by electromagnetic interference (EMI).

Battery stack cell monitor

An AM stereo receiver in which a synchronous in-phase signal is determined comprises a low pass filter circuit for determining an average DC value of the synchronous in-phase signal, a reference voltage supply for providing a reference voltage indicative of a predetermined portion of the DC value of the synchronous in-phase signal occurring during a 100% IF signal level condition, a comparison circuit for comparing the average DC value of the synchronous in-phase signal to the predetermined reference, and an output circuit outputting a signal indicative of an out-of-lock condition when the average DC value of the synchronous in-phase signal falls below the predetermined reference.

Out-of-lock detector for synchronous AM detection

A synchronous AM detector and processor requiring a reduced number of external components and fewer integrated circuit pins comprises an audio processor having a first filter operation controlled by a control voltage and an AM stereo decoder including a lock detector and a phase locked loop having a second filter operation controlled by the control voltage. A single control node is coupled to the audio processor and the phase locked loop, the control node providing the control voltage for the audio processor and the phase locked loop. The voltage at the control node is biased normally high, capable of being pulled low by the audio processing circuit and capable of being pulled low by the lock detector. An RC circuit decays the rise time of the control voltage at the control node after the control voltage has been pulled low. Circuitry is added to control the first filter operation of the audio processing circuitry responsive to the control voltage at the control node. Additional circuitry is added to control the second filter operation of the phase locked loop in response to the control voltage level.

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Carmel, IN, United States of America

Thomas Gerard Block