Dr. Johannes Heidenhain Gmbh

University of Limerick

Thomas Fleischmann

Stephan Kreuzer

Bernhard Beaury

Michael Walter

Markus Mooshammer

Daniel Schenzinger

Brendan Mullane

Manfred Huber

Vincent O'Brien

A bus system has a daisy-chain configuration. The bus system includes a master unit and a plurality of slave units that are serially connected to the master unit downstream thereof via a line system. A first one of the slave units first connected downstream of the master unit is configured to invert a request signal, which is provided by the master unit and received via a first line section of the line system, and to output the inverted request signal on a second line section of the line system leading to an adjacent, second one of the slave units.

Bus system and slave unit for a bus system

A method for serial data transmission between a position-measuring device and subsequent electronics over a bidirectional data channel includes transmitting data in data frames and in encoded form in accordance with a data transmission code. The data transmission in each case is initiated by an interface unit at a transmitter end with a start sequence having an encoding scheme that at least partially differs from an encoding scheme of a remainder of the data frames. After a reversal of data direction, an interface unit at a receiver end detects a beginning of the data transmission in each case by detection of the start sequence.

Method and device for serial data transmission over a bidirectional data channel

A test system () comprises a system-on-chip with a memory () for storing sample data; and a dynamic test engine () to control input of dynamic test waveforms including sinusoidal waveforms to an ADC under test () and to determine device under test dynamic parameters by analysing the samples. A linear test engine () determines device under test () static parameters, and controls input of ramp input waveforms to the ADC. A test controller () performs finite sate machine control of testing including applying test waveforms, dumping samples to the memory (), and retrieving static and dynamic results. A DAC () generates controlled waveform generation under instructions from the test engines, and an interface () communicates with an external host. The components are linked with a bus () and are modular. The test system () is adapted to re-use the memory () for both test sample acquisition, and operation of the device under test () is adapted to enable re-use circuits in order to minimize logic overheads and maximize use other than ADC test and measurement. The linear and dynamic test engines () perform parallel linear and dynamic testing in which dynamic testing sample acquisition and processing takes place during application of a ramped input for linear testing.

Testing system

Growing community of inventors

Laufen, Germany

Thomas Fleischmann