Infineon Technologies Ag

Infineon Technologies Austria Ag

Lantiq Deutschland Gmbh

Lantiq Beteiligungs Gmbh & Co. Kg

Thomas Ferianz

Kennith Kin Leong

Gerhard Noessing

Thomas Linder

Dietmar Straeussnigg

Martin Clara

Derek Bernardon

Bernhard Zojer

Herbert Zojer

Joachim Pichler

Fabio Ballarin

Tobias Gerber

Andreas Wiesbauer

Christian Jenkner

Peter Singerl

Hermann Gruber

Christian Fleischhacker

Peter Caldera

Thomas Pötscher

Maria Lagioia

Dario Giotta

Gerfried Krampl

Markus Muellauer

Peter Linortner

Rüdiger Koban

Robert Piskernik

Ruediger Koban

Andre Rossberg

Peter Singeri

Filipe Esteves Tavora

Gernot Kasebacher

Andrea Morici

An integrated circuit with galvanic isolation is described herein. In accordance with one example, the circuit comprises a galvanic insulation barrier including a first isolation element configured to separate a first isolation domain from a second isolation domain and a first channel configured to transmit—in a first mode of operation and across the first isolation element—a logic signal from a first input in the first isolation domain to a first output in the second isolation domain. The first channel is further configured to transmit—in a second mode of operation and across the first isolation element—a serial data stream from the first input to a logic circuit in the second isolation domain, wherein the logic circuit is configured to receive—in the second mode of operation—the serial data stream and to store configuration information included in the serial data stream in a memory.

Integrated circuit with galvanic isolation

A power stage includes: a first transformer; a second transformer; a third transformer; a GaN (gallium nitride) enhancement mode power transistor configured to conduct a load current when driven by a gate current derived from energy transferred by the first transformer; a GaN depletion mode transistor configured to turn off the GaN enhancement mode power transistor absent a threshold voltage applied across a gate and a source of the GaN depletion mode transistor; a voltage clamping device or circuit configured to turn off the GaN depletion mode transistor when reverse biased by a bias current derived from energy transferred by the second transformer; and a GaN enhancement mode transistor configured to turn on the GaN depletion mode transistor when driven by a gate current derived from energy transferred by the third transformer.

Transformer-based drive for GaN devices

Current sense circuitry includes: a current mirror circuit for sensing a power transistor current; a capacitor directly connected to the current mirror circuit at a first node; and a comparator circuit having a first input electrically connected to an input terminal of the current mirror circuit, a second input electrically connected to a drain or source terminal of the power transistor, and an output that is in a first state when a voltage at the first input is higher than a voltage at the second input and in a second state when the voltage at the first input is lower than the voltage at the second input. Current is sourced to the first node if the power transistor is on and the comparator output is in the second state, and sunk from the first node if the power transistor is on and the comparator output is in the first state.

Current sense circuitry

An example apparatus as discussed herein includes a first communication circuit and a second communication circuit. A communication link couples the first communication circuit and the second communication circuit. The communication link conveys signals between the first communication circuit and the second communication circuit. The first communication circuit includes a first active inductor set to a first inductance; the first inductance controls a resonant frequency (carrier frequency) of communicating signals from the first communication circuit. The second communication circuit includes a second active inductor set to a second inductance. The second inductance controls a frequency response (such as band-pass resonant frequency) of a band-pass filter in the second communication circuit. The setting of the first inductance and the second inductance aligns the resonant frequency of the transmitted signals with respect to a peak or center frequency passed by the band-pass filter.

Active inductor implementation in a communication system

Transformer-driven power switch devices are provided for switching high currents. These devices include power switches, such as Gallium Nitride (GaN) transistors. Transformers are used to transfer both control timing and power for controlling the power switches. These transformers may be coreless, such that they may be integrated within a silicon die. Rectifiers, pulldown control circuitry, and related are preferably integrated in the same die as a power switch, e.g., in a GaN die, such that a transformer-driven switch device is entirely comprised on a silicon die and a GaN die, and does not necessarily require a (large) cored transformer, auxiliary power supplies, or level shifting circuitry.

Switch device having a pulldown transistor and a voltage clamp

Circuits and devices are provided for reliably holding a normally-off Gallium Nitride (GaN) power transistor, such as a Gate Injection Transistor (GIT), in a non-conducting state when a gate of the power transistor is not driven with an active (turn-on) control signal. This is accomplished by coupling a normally-on pulldown transistor between the gate and the source of the power transistor, such that the pulldown transistor shorts the gate to the source when the power transistor is not set for its conducting state. The pulldown transistor is preferably located on the same semiconductor die as, and in close proximity to, the power transistor, so as to avoid spurious noise at the power transistor gate that may unintentionally turn on the power transistor. A pulldown control circuit is coupled to the gate of the pulldown transistor and autonomously turns off the pulldown transistor when the power transistor is set to conduct.

GaN switch with integrated failsafe pulldown circuit

Transformer-driven power switch devices are provided for switching high currents. These devices include power switches, such as Gallium Nitride (GaN) transistors. Transformers are used to transfer both control timing and power for controlling the power switches. These transformers may be careless, such that they may be integrated within a silicon die. Rectifiers, pulldown control circuitry, and related are preferably integrated in the same die as a power switch, e.g., in a GaN die, such that a transformer-driven switch device is entirely comprised on a silicon die and a GaN die, and does not necessarily require a (large) cored transformer, auxiliary power supplies, or level shifting circuitry.

Transformer-based driver for power switches

A circuit arrangement is enclosed. The circuit arrangement includes a first electronic circuit; a second electronic circuit; and a coupling circuit connected between the first electronic circuit and the second electronic circuit. The first electronic circuit is at least partially integrated in a first region of a semiconductor layer, the second electronic circuit is at least partially integrated in a second region of the semiconductor layer, and the second region adjoins a first insulating layer formed on a first surface of the semiconductor layer and is electrically insulated from the first region by a second insulating layer. Further, the coupling circuit is arranged in a third insulating layer formed on a second surface of the semiconductor layer and comprises at least two capacitors connected in series.

Circuit arrangement with galvanic isolation between electronic circuits

An electronic circuit includes a first input pin configured to receive a first input signal that includes an enable information and at least one operation parameter information, a second input pin configured to receive a second input signal, an output pin, a control circuit configured to generate a drive signal based on the first input signal and the second input signal, an output circuit configured to generate an output signal at the output pin, the enable information includes an enabled state and a disabled state, the control circuit is configured to generate the drive signal in the enabled state and to turn to the electronic circuit off in the disabled state, the at least one operation parameter information includes information about an operational parameter of the output signal, and the output circuit is configured to use the at least one operation parameter information to change the operational parameter of the output signal.

Electronic drive circuit

Integrated failsafe pulldown circuit for GaN switch

A drive circuit for a transistor component is described. The drive circuit comprises: an output, which is designed to be connected to a drive input of a transistor component and which has a first output node and a second output node; an input, which is designed to receive an input signal, which is referred to a reference potential, and which has a first input node and a second input node; a differential amplifier arrangement, which is connected to the first input node, the second input node, and the second output node, and which is designed to generate a drive signal based on the input signal; and a driver circuit, which is designed to receive the drive signal and to generate a drive voltage between the first and second output node based on the drive signal.

Drive circuit for a transistor component

According to an embodiment of an electronic circuit, the electronic circuit includes a first input pin, a second input pin, an output pin, a control circuit and an output circuit. The first input pin is configured to receive a first input signal that includes an enable information and at least one operation parameter information. The second input pin is configured to receive a second input signal. The control circuit is configured to generate a drive signal based on the enable information included in the first input signal and the second input signal. The output circuit is configured to generate an output signal at the output pin such that a timing of the output signal is dependent on the drive signal and at least one parameter of the output signal is dependent on the at least one operation parameter information included in the first input signal.

An electronic circuit includes an input configured to receive an input signal and an output configured to be coupled to load, an output transistor including a load path and a control node, the load path being connected between the output and a first supply node, a drive transistor including a load path and a control node, the load path being connected to the control node of the output transistor, a first electronic switch connected in series with the load path of the drive transistor, a biasing circuit including an internal impedance and connected between the control node of the drive transistor and the first supply node, and a control circuit configured to receive the input signal and to drive the first electronic switch based on the input signal.

A drive circuit may be configured to switch on an MOS transistor by precharging an input capacitance of the MOS transistor with a substantially constant amount of charge in a precharging phase, and charging the input capacitance with a controlled charging current after the precharging phase.

Driving an MOS transistor with constant precharging

Audio processing systems and corresponding methods are disclosed, wherein the audio processing system comprises at least one of an analog portion and a digital portion.

Growing community of inventors

Bodensdorf, Austria

Thomas Ferianz