Texas Instruments Corporation

Thomas F Adkins

Eric G Soenen

Gregory B Davis

Russell K MacDonald

Roman Staszewski

Loulis J Izzi

An integrated circuit configurable as a transmitter/receiver includes learn capabilities that allows a receiver IC to memorize the identification pattern of a specific transmitter.

Combined transmitter/receiver integrated circuit with learn mode

An improved electrically erasable read only memory (EEPROM) includes a EEPROM cell and a static random access memory (SRAM) cell. Complementary pairs of complementary metal oxide semiconductor (CMOS) transistors connect the gates of transistors forming the EEPROM cell to either the corresponding data nodes of the SRAM cell or to a fixed read or nonzero test voltage. When formed into an array, it is not necessary to replicate differential sense circuitry in every cell. EEPROM transistor pairs are combined into columns which share a common sense latch. The nonsero test voltage allows for measurement of the actual threshold voltages (V.sub.T) of each EEPROM device individually.

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Coppell, TX, United States of America

Thomas F Adkins