Commissariat a L'energie Atomique

Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Centre National De La Recherche Scientifique

California Institute of Technology

Centre National De La Recherche Scientifique-cnrs

Thomas Ernst

Stephan Borel

Philippe Andreucci

Laurent Duraffourg

Jean-Charles Barbe

Hubert Moriceau

Laurent Grenouillet

Michael Roukes

Olivier Thomas

Emmanuel Augendre

Gabriel Molas

Simon Deleonibus

Perrine Batude

Eric Colinet

Sylvain Maitrejean

Thierry Poiroux

Sebastien Hentz

Thierry Baron

Sébastien Hentz

Edward B Myers

Sorin Ioan Cristoloveanu

Pierre Ferret

Thomas Alava

François Andrieu

Jean-Christophe Gabriel

Marie-Anne Jaud

Marek Kostrzewa

Pascal Gentile

Zheng Han

Barbara De Salvo

Erwan Dornel

Cecilia Dupre

Stéfan Landis

Bassem Salem

Stéphan Borel

Christian Isheden

Cécilia Dupre

Issam Ouerghi

Stephane Becu

Alexandre Hubert

Maryline Bawedin

Paul-Henry Morel

Michael L Roukes

Stéphanel Becu

Production of a transistor, the channel structure of which comprises at least one finned channel structure, the method comprising: forming, from a substrate (), a molding block (), forming, on the molding block, a thin layer () made from a given semiconductor or semi-metallic material, and consisting of one to ten atomic or molecular monolayers of two-dimensional crystal, withdrawing the molding block while retaining a portion () of the thin layer extending against a lateral face of the molding block, said retained portion () forming a fin that is capable of forming a channel structure of the transistor,

Field effect transistor with an atomically thin channel

Electromechanical detection device, particularly for gravimetric detection, and method for manufacturing the device. The electromechanical detection device includes a support including a face defining a plane, at least one beam that can move relative to the support, and means of detecting beam displacement, outputting a signal that depends on the displacement. The beam is anchored to the support through an end and is approximately perpendicular to the plane, and the other end of the beam includes at least one reception zone that can receive one or several particles causing or modifying displacement of the beam, in order to determine at least one physical property of the particle(s) from the signal. According to the invention, the detection means are located between the reception zone and the support.

Electromechanical detection device, particularly for gravimetric detection, and method for manufacturing the device

A device for analyzing a fluid, including a layer including a plurality of sensors of MEMS and/or NEMS type, a layer including a mechanism controlling the sensor and for processing information transmitted by the sensors, the control and processing mechanism being electrically connected to the detectors, and a layer positioned on the layer including the sensors on a side of a face including the sensors including a mechanism spatially and temporally distributing the fluid on the sensors.

Analysis device including a MEMS and/or NEMS network

A method of making crystal semi-conducting material-based elements, including providing a support having amorphous semi-conducting material-based semi-conducting elements, the support being further provided with one or more components and with a reflective protective area configured so as to reflect a light radiation in a given wavelength range, exposing the element(s) to a laser radiation emitting in the given wavelength range so as to recrystallize the elements, the reflective protective area being arranged on the support relative to the elements and to the components so as to reflect the laser radiation and protect the components from this radiation.

Method of localized annealing of semi-conducting elements using a reflective area

A device including: a nanowire that includes a first conductive region, and a second region, wherein the second region is an insulator material, the second region does not occupy an entire thickness of the nanowire, and the nanowire is configured so that a current is able to circulate in the nanowire from one end of the nanowire to another end of the nanowire.

Nanowire sensor device

A microelectronic flash memory device including a plurality of memory cells including transistors fitted with a matrix of channels connecting a block of common source to a second block on which bit lines rest, the transistors also being formed by a plurality of gates including at least one gate material, including a first selection gate coating the channels, a plurality of control gates coating the channels, a plurality of second selection gates each coating the channels of the same row and the matricial arrangement, at least one or more of the gates based on superposition of layers including at least one first layer of dielectrical material, at least one charge store zone, and at least one second layer of dielectrical material.

Structure and production process of a microelectronic 3D memory device of flash NAND type

A memory device is provided, including a back gate including a first portion of electrically conductive material, a first portion of dielectric material arranged on the back gate, a semiconductor nanobeam arranged on the first portion of dielectric material, a second portion of dielectric material covering the semiconductor nanobeam, a portion of material configured to receive electrons and holes, and configured to store electrical charges and covering the second portion of dielectric material, a third portion of dielectric material covering the portion of material configured to perform storage of electrical charges, and a front gate including a second portion of electrically conductive material covering the third portion of dielectric material.

Multilevel memory device

A microelectronic device, including: a substrate and a plurality of metal interconnection levels stacked on the substrate; a first metal line of a given metal interconnection level; a second metal line of another metal interconnection level located above the given metal interconnection level, the first and second lines are interconnected via at least one semiconductor connection element extending in a direction forming a nonzero angle with the first metal lines and the second metal line; and a gate electrode capable of controlling conduction of the semiconductor connection element.

Microelectronic device having metal interconnection levels connected by programmable vias

Method of fabricating an electro-mechanical microsystem provided with at least one fixed part comprising a bar, and at least one mobile part in rotation around at least one portion of said bar, the method comprising the steps of:

Method of fabricating an electromechanical component using graphene

A microelectronic device including, on a substrate, at least one element such as a SRAM memory cell; one or more first transistor(s), respectively including a number k of channels (k&#x2267;1) parallel in a direction forming a non-zero angle with the main plane of the substrate, and one or more second transistor(s), respectively including a number m of channels, such that m&#x3e;k, parallel in a direction forming a non-zero angle, or an orthogonal direction, with the main plane of the substrate.

SRAM memory cell provided with transistors having a vertical multichannel structure

A method for fabricating a microelectronic device comprising: a support, an etched stack of thin layers comprising: at least one first block and at least one second block resting on the support, in which at least one drain region and at least one source region, respectively, are capable of being formed, several semiconductor bars connecting a first zone of the first block and another zone of the second block, and able to form a multi-branch transistor channel, or several transistor channels, the device also comprising: a gate surrounding said bars and located between said first block and said second block, the gate being in contact with a first and a second insulating spacer in contact with at least one sidewall of the first block and with at least one sidewall of the second block, respectively, and at least partially separated from the first block and the second block, via said insulating spacers.

Production of a transistor gate on a multibranch channel structure and means for isolating this gate from the source and drain regions

The disclosure concerns a microelectronic device provided with one or more &#x3c;&#x3c;quantum wires&#x3e;&#x3e;, able to form one or more transistor channels, and optimized in terms of arrangement, shape or/and composition. The invention also uses a method for fabricating said device, comprising the steps of: the forming, in one or more thin layers resting on a support, of a first block and a second block in which at least one transistor drain region and at least one transistor source region are respectively intended to be formed, and of a structure connecting the first block to the second block, and the forming, on the surface of the structure, of wires connecting a first region of the first block with another region of the second block which faces the first region.

Structure and method for fabricating a microelectronic device provided with one or more quantum wires able to form one or more transistor channels

The invention relates to a method for straining or deforming a pattern or a thin layer (), starting from an initial component comprising the said thin layer and a prestressed layer (), this method comprising:

Method of stressing a thin pattern

Double gate transistor microelectronic device comprising:

Double-gate transistor structure equipped with a multi-branch channel

A method of manufacturing at least one nanowire, the nanowire being parallel to its supporting substrate, the method including the formation on the supporting substrate of a structure comprising a bar and two regions, a first end of the bar being secured to one of the two regions and a second end of the bar being secured to the other region, the width of the bar being less than the width of the regions, the subjection of the bar to an annealing under gaseous atmosphere in order to transform the bar into a nanowire, the annealing being carried out under conditions allowing control of the sizing of the neck produced during the formation of the nanowire.

Method of manufacturing nanowires parallel to the supporting substrate

Growing community of inventors

Morette, France

Thomas Ernst