Silicon Laboratories Inc.

Dell Products Inc.

Thomas Edward Voor

Attila Zolomy

Pasi Rahikkala

Jeffrey Lee Sonntag

Hendricus De Ruijter

Adolfo Sandor Montero

Nicholas Diciurcio Grobelny

Merle Wood, Iii

Sean P O'Neal

James T Gillon

Nathan Francis Martell

Luigi Panseri

Euisoo Yoo

Zoltan Vida

Richard Hendricks

John M Khoury

Wei-Cheng Jason Yu

Tsung-Cheng Liao

Marcin M Nowak

Jeffrey A Tindle

Tun-Chieh Liang

Logan Lucas

Wei Shen

In one aspect, an apparatus includes a receive path to receive, process and output a receive radio frequency (RF) signal, the receive path comprising at least one low noise amplifier (LNA) and a plurality of signal nodes. The receive path may be configurable to operate in a plurality of modes. The apparatus also may include at least one filter to filter the receive RF signal and at least one detector circuit to detect one or more levels present at one or more of the plurality of signal nodes. The apparatus may configure an order of the at least one LNA and the at least one filter, based at least in part on the one or more levels detected in the at least one detector circuit.

Configurable receiver front end module having configurable detection capabilities

In one aspect, a method comprises: receiving, in a controller of a wireless device, at least one of a first interrupt or a second interrupt, where: the first interrupt is to indicate that a receive radio frequency (RF) signal received in a front end circuit of the wireless device is overloading at least a low noise amplifier (LNA) of the front end circuit; and the second interrupt is to indicate that the receive RF signal is overloading at least a passive network of a system on chip (SoC) of the wireless device; and in response to the at least one of the first interrupt or the second interrupt, reconfiguring the front end circuit from a first mode into a second mode, where a relative order of a receiver RF signal processing path is different in the first mode than in the second mode.

Interrupt driven reconfiguration of configurable receiver front end module

In one embodiment, an apparatus includes: a transmit path to receive, process and output a transmit radio frequency (RF) signal, the transmit path including a first power amplifier; a receive path to receive, process and output a receive RF signal, the receive path including a first low noise amplifier (LNA); and switching circuitry coupled to the transmit path and the receive path. In a transmit mode, the switching circuitry is to cause a RF filter to couple into the transmit path to filter the transmit RF signal and cause the filtered transmit RF signal to be provided to the first power amplifier and thereafter to an antenna. In a receive mode, the switching circuitry is to cause the receive RF signal to be provided to the RF filter and the first LNA, and thereafter to be provided to a digital processor.

Providing a single filter for transmit and receive modes

In one aspect, a method comprises: initializing a front end circuit of a wireless device into a first mode in which a radio frequency (RF) signal processing path comprises a low noise amplifier (LNA) having an output coupled to an RF filter; and in response to an RF signal received in the front end circuit having a level greater than a first threshold, reconfiguring the front end circuit into a second mode in which the RF filter is coupled to an input of the LNA.

Initialization of configurable receiver front end module into a selected mode

In one aspect, an apparatus comprises a transmit path including a power amplifier to receive, process and output a transmit radio frequency (RF) signal the transmit path comprising a power amplifier. A detection circuit coupled to the transmit path may be configured to: detect, during a first portion of a packet of the transmit RF signal, a level of the transmit RF signal at an input to the power amplifier; and detect, during a second portion of the packet of the transmit RF signal the level of the transmit RF signal at an output of the power amplifier. Based at least in part on the detected level at at least one of the power amplifier input or output, a level of at least one component of the transmit path upstream to the power amplifier is to be updated, to control a transmit power variation of the transmit RF signal.

Power variation correction for a transmitter

An apparatus includes a substrate and a loop antenna formed using the substrate. The loop antenna includes a set of gaps formed to isolate a first part of the loop antenna from a second part of the loop antenna.

Apparatus with partitioned radio frequency antenna and matching network and associated methods

An apparatus includes a radio frequency (RF) circuit to transmit or receive RF signals. The apparatus further includes a loop antenna to transmit or receive the RF signals. The apparatus further includes an impedance matching circuit coupled to the RF circuit and to the loop antenna. The impedance matching circuit includes lumped reactive components.

An apparatus includes a module, which includes an impedance matching circuit. The apparatus further includes a capacitor that is external to the module, and is coupled to the impedance matching circuit. The apparatus further includes a loop antenna to transmit or receive the RF signals. The loop antenna is coupled to the capacitor.

Apparatus for antenna impedance-matching and associated methods

An information handling system (IHS) unambiguously addresses networked devices connected by a local area network (LAN) based network interface controller (NIC) by detecting a device descriptor of LAN-based NIC, determining that the device descriptor indicates a capability for assigning a reserve media access control (MAC) address to the networked device, writing the reserve MAC address in the LAN-based NIC of the networked device, and associating the reserve MAC address with the networked device in an inventory data structure for the IHS.

UEFI and operating system driver methods for updating MAC address in LAN-based NIC

In an embodiment, an integrated circuit includes: a switched capacitor coupled between a supply voltage node and a divider node, where a thermistor external to the integrated circuit is to couple to the divider node; an analog-to-digital converter (ADC) coupled to the divider node to receive a voltage at the divider node and generate a digital value based thereon; and a controller coupled to the ADC to determine a temperature associated with the thermistor based at least in part on the digital value.

System, apparatus and method for accurate measurement of off-chip temperature

A system and method of performing temperature compensation based on temperature of a crystal. An integrated circuit includes a clock circuit, a memory, an interface developing a sense voltage indicative of a temperature of the crystal, and a controller. The memory stores compensation values including nominal values based on a nominal third order polynomial that defines a nominal frequency versus temperature relationship of a crystal design representing multiple crystals, and a pair of adjustment values derived from two temperature-frequency error points. The controller determines a temperature value based on the sense voltage, calculates a frequency offset using the temperature value and the compensation values to solve a compensated third order polynomial defining a compensated frequency versus temperature relationship of the crystal, and adjusts a clock signal of the clock circuit using the frequency offset. A Wi-Fi device may be optimized for industrial IoT operating within an extended temperature range.

Growing community of inventors

Cedar Park, TX, United States of America

Thomas Edward Voor