Northern Telecom Limited

Telecommunications Research Laboratories

Alberta Telecommunications Research Centre

Thomas E Moore

James A McEachern

Wayne D Grover

Mark Stephen Wight

A DS-3 to 28 VT1.5 SONET Interface Circuit is shown, without using standard intermediate DS-2 and DS-1 Desynchronizer Phase-Lock Loops. The elimination of DS-2 and DS-1 Desynchronizer Phase Lock Loops results in a significant reduction in cost and complexity of SONET interface circuits for the existing asynchronous digital multiplex hierarchy.

Method and apparatus for mapping a digital signal carrier to another

A method of and apparatus for synchronizing an asynchronous DS1 signal to produce a synchronized signal in the SONET format is described. The asynchronous signal is stuffed in dependence upon a stuff request signal which is produced from a comparison with a threshold level of a phase difference between read and write phases with which the synchronized and asynchronous signals are respectively read from and written into an elastic store. The phase detection and threshold comparison are effected synchronously with the respective signals. To this end, the read address for the store is latched in synchronism with the synchronized frames, and its difference from the write address and the resulting threshold level comparison is effected in synchronism with the write clock for the store and hence with the asynchronous signal. The synchronizer provides a reduced waiting time jitter in the synchronized signal.

Synchronization of asynchronous data signals

A series of nodes in a telecommunications network are connected by a bi-directional transmission path. An outgoing signal passes each of the intermediate nodes in the path and sets a counter timing at each intermediate node. The outgoing signal then returns from the loop node with time information attached to it. As the returning trigger signal passes the intermediate nodes, the intermediate nodes stop counting the elapsed time since the trigger signal passed the intermediate node, and latches the time information. Precision time synchronization information is then determined for each intermediate node by halfing the two way travel time from the intermediate node to the loop node, adjusting for propagation and processing delays, and adding it to the time information from the loop node.

Method and apparatus for precision time distribution in

An asynchronous data signal is synchronized by stuffing in dependence upon phase differences between the asynchronous signal and a resultant synchronized signal. The synchronized signal comprises tdm frames each including data bits and a stuffing opportunity bit, and a plurality of frames constitute a superframe in which different frames have different numbers of data bits. To compensate for the biassed timing of stuff requests which would otherwise occur relative to the frame timing in the superframes, the threshold value with which the phase difference is compared to produce the stuff requests is modified with a stepped sawtooth waveform having a period equal to that of the superframe.

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Edmonton, Canada

Thomas E Moore