Micro Technology, Inc.

Unisys Corporation

Mti Technology Corporation

Beaufort River, Inc.

Emc Corporation

Sf2 Corporation

Thomas E Idleman

David T Powers

Joseph S Glider

David H Jaffe

Larry P Henson

Kumar Gajjar

Robert S Koontz

Jesse I Stamness

Randy H Katz

Hoke S Johnson, Iii

Hoke S Johnson Iii

A method and apparatus for controlling data flow between a computer (10) producing a high speed data stream coupled to a buffered storage device including a disc array (43) and to a group of slower speed storage devices including tape drives arranged in a predetermined logical configuration including arrays (42). The system includes controllers (41) that work together such that if one of the controllers fails, the routing between the controllers and the tape drives is switched to the properly functioning controller without the need to involve the computer or operator in the rerouting process thus providing a redundancy of access control and sequencing. The apparatus also includes components which permit a functioning controller to assume control of tape arrays formerly primarily controlled by the failed controller. In addition, the apparatus provides error check and correction generation devices (45, 58) as well as tape storage device configuration circuitry.

Data storage system and method

A method and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. More particularly, there is provided a method and apparatus for determining, on restoration of power to a device set, whether or not a write operation was interrupted when power was removed, and for reconstructing any data that may be inconsistent because of the removal of power.

Non-volatile memory storage of write operation identifier in data

The present invention provides a method and apparatus for dynamically modifying the priority of access to a bus, where the bus has control and arbitration functions distributed among the devices coupled to the bus, with each device having a fixed priority level. Access to the bus by particular devices is selectively inhibited, preventing them from asserting their fixed priority level. In a preferred embodiment, the present invention provides control over the reselection of a SCSI bus by a plurality of SCSI devices coupled to the bus by providing a pseudo busy signal to SCSI devices from which reselection is not desired. In this fashion, an initiator may issue a plurality of commands to the SCSI devices and control the order in which the devices will be serviced when ready. A plurality of pseudo busy circuits are provided, with one coupled to each device on the bus. Each pseudo busy circuit is controlled by a control signal from the initiator. The pseudo busy circuit intercepts the busy line of the SCSI bus and provides a pseudo busy signal to the busy line input of the device when instructed by the initiator, although this requires additional control lines in conjunction with the SCSI bus, it allows the use of standard peripherals connectors and controllers designed for the SCSI bus.

Controlled bus reselection interface and method

A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remains constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily controlled by the failed second level controller.

Apparatus and method for controlling data flow between a computer and

Removable housing for computers

Non-volatile memory storage of write operation indentifier in data

Methods and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. A method and apparatus is provided for detecting and reconstructing incorrectly routed data. A method and apparatus is also provided for detecting when one or more physical devices fails to write a block of data, and for reconstructing lost data.

Data corrections applicable to redundant arrays of independent disks

An improved input/output subsystem allowing data transfers between the input/output subsystem and an input/output controller along a subsystem input/output bus to occur at a data transfer rate established by the transfer rate of the processor bus connected between the input/output controller and the central processing unit. Data is transferred from an electronic memory within the input/output subsystem to data buffers within the input/output controller via a direct memory access.

Variable data rate improvement of disc cache subsystem

The present invention provides a method and apparatus for dynamically modifying the priority of access to a bus, where the bus has control and arbitration functions distributed among the devices coupled to the bus, with each device having a fixed priority level. Access to the bus by particular devices is selectively inhibited, preventing them from asserting their fixed priority level. In a preferred embodiment, the present invention provides control over the reselection of a SCSI bus by a plurality of SCSI devices coupled to the bus by providing a pseudo busy signal to SCSI devices from which reselection is not desired. In this fashion, an initiator may issue a plurality of commands to the SCSI devices and control the order in which the devices will be serviced when ready. A plurality of pseudo busy circuits are provided, with one coupled to each device on the bus. Each pseudo busy circuit is controlled by a control signal from the initiator. The pseudo busy circuit intercepts the busy line of the SCSI bus and provides a pseudo busy signal to the busy line input of the device when instructed by the initiator; although this requires additional control lines in conjunction with the SCSI bus, it allows the use of standard peripherals connectors and controllers designed for the SCSI bus.

Method and apparatus for controlling reselection of a bus by overriding

A network-type data processing system is provided. The system can support multiple simultaneous exchanges of data, and includes multi-port storage devices in which all ports can be active at all times. On initialization of the system, each storage device can announce itself through all of its ports simultaneously.

Multi-sort mass storage device announcing its active paths without

In a data processing system communicating with disc drives via a disk channel, a disc cache subsystem coupled between the outboard side of the channel and the disc drives. The disc cache subsystem includes a plural-level cache memory comprised of a first memory and a second memory, wherein the first memory serves as input/output storage for the second memory. Provision is also made for controlling which of a plurality of disc drives is to be subject to caching by controlling which drives are to be bypassed.

Disc cache subsystem having plural-level cache memories

A method and apparatus for identifying each of the members of a set of physical mass storage devices acting as one logical mass storage device are provided. Each physical mass storage device is assigned a membership signature identifying it as a valid member of the set. Whenever a member of a set undergoes a change in membership status, the membership signatures of all other devices in the set are changed, so that the member with the changed membership state no longer has a valid signature. When the member is reinstalled, it can be given a new valid signature after it is updated or regenerated.

Method and apparatus for assigning signatures to identify members of a

A mass memory system for digital computers is disclosed. The system has a plurality of disk drives coupled to a plurality of small buffers. An Error Correction Controller is coupled to a plurality of X-bar switches, the X-bar switches being connected between each disk drive and its buffers. Data is read from and written to the disk drives in parallel and error correction is also performed in parallel. The X-bar switches are used to couple and decouple functional and nonfunctional disk drives to the system as necessary. Likewise, the buffers can be disconnected from the system should they fail. The parallel architecture, combined with a Reed-Solomon error detection and correction scheme and X-bar switches allows the system to tolerate and correct any two failed drives, allowing for high fault-tolerance operation.

Failure-tolerant mass storage system

A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remains constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily controlled by the failed second level controller. In addition, the invention provides error check and correction as well as mass storage device configuration circuitry.

Growing community of inventors

Santa Clara, CA, United States of America

Thomas E Idleman