Infineon Technologies Ag

Thomas Duda

Torsten Hinz

Peter Gregorius

Martin Renner

Lajos Gazsi

Christoph Braun

Jörg Bonhaus

Guenter Krasser

Lajos Gaszi

A circuit for operating loudspeakers includes a first, second, third and fourth loudspeaker circuit, having one input each for injecting a signal and one output each for connecting a loudspeaker input. The loudspeaker circuits are designed to amplify the injected signal and to provide the amplified signal at the outputs thereof. The loudspeaker circuits can, for example, be used for a 2.1 sound system. The three channels for a 2.1 sound system can be implemented by an amplifier circuit with four loudspeaker circuits, one loudspeaker circuit each being required for the two stereo channels left and right. A subwoofer channel can be driven differentially by two loudspeaker circuits. The stereo channels are, by contrast, only still connected to one loudspeaker circuit each, and so the stereo channels require at least one further common ground cable.

Method for driving loudspeakers

A method for synchronizing a clock signal with a reference signal is disclosed. One embodiment has a first synchronization part which has a bit pattern having a particular clock period, a pause whose length is a multiple of this clock period plus a fraction of the clock period, and a second synchronization part having the particular clock period. The method includes generating a phase difference signal which is proportional to a phase difference between the clock signal and the reference signal, filtering the phase difference signal and providing a filtered phase difference signal, driving a digital oscillator in such a manner that the frequency of the clock signal is changed on the basis of the filtered phase difference signal, the phase of the clock signal within a clock period being corrected by a value corresponding to the fraction of the clock period at an end of the pause in the reference signal.

Method for synchronizing a clock signal with a reference signal, and phase locked loop

A device for the production of standard compliant signals, for example pulse-type signals in a telecommunication network, serves the production and adaptation and/or pre-distortion of signals with a certain signal form, which is defined dependent on a standard signal form specified in a standard. The device comprises signal generation means () for the production of the signals with a certain signal form and signal adjustment means () for the adaptation or pre-distortion of the signals. The signal generation means () according to the invention are digitally realized, by using a programmable shift register (), which contains multipliers specified by the standard signal form for multiplication with a digital input signal (). The signal adjustment means () comprise substantially scalable digital filter arrangements in the form of a serial connection of digital filters () with a downstream multiplexer (). Moreover, the invention provides attenuating means () for attenuation of the signal dependent on the characteristics of the telecommunication channel.

Device for the production of standard-compliant signals

A method and a device for reconstructing data, clocked at a symbol rate, from a signal which has been distorted by transmission of a transmission link, are disclosed. The method or respectively, the device, being predominantly performed or implemented, respectively, by means of digital circuit technology in order to improve the quality of the data recovery. The method includes amplifying the signal amplitude attenuated by the transmission; filtering high-frequency interference frequencies above the symbol rate; discretizing the analog signal by means of an analog/digital converter; performing a cable approximation by means of a digitally implemented cable approximation filter in order to obtain an equalized signal; and recovering the data from the equalized signal by means of a phase-locked loop.

Method for reconstructing data clocked at a symbol rate from a distorted analog signal

The invention provides a method for recovering a digital datastream, in which a reference clock phase is recovered from the digital datastream, the digital datastream being received in a datastream receiver, low-pass filtered in a low-pass filter device, an edge position signal being determined by comparing an amplitude of the low-pass filtered datastream with a predetermined threshold value in an edge position detection device and a phase deviation being determined from a time difference between a 0/1 threshold intersection point of the threshold value with a 0/1 data transition or a &#x2212;1/1 threshold intersection point of the threshold value with a &#x2212;1/1 data transmission and the target time of the control system in a phase correction device, so that the phase deviation can be corrected with the phase correction offset in the phase correction device.

Method for determining a reference clock phase from band-limited digital data streams

PLL circuit for eliminating self-jitter in a signal which is received by a control circuit, having a phase comparison circuit for producing a phase difference signal, which indicates the phase difference between the received signal and a fed-back output signal from the PLL circuit; having a loop filter for filtering the phase difference signal which is produced; having an oscillator, which is controlled by the filtered phase difference signal, for producing the output signal from the PLL circuit; with the loop filter having a nonlinear transfer function.

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Duisburg, Germany

Thomas Duda