Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Unversität Zürich

Commissariat a L'energie Atomique Et Aux Energies Alternatives

Thomas Dalgaty

Elisa Vianello

Giacomo Indiveri

Niccolo Castellani

Melika Payvand

Elisas Vianello

A Bayesian neural network including an input layer, and, an output layer, and, possibly, one or more hidden layer(s). Each neuron of a layer is connected at its input with a plurality of synapses, the synapses of the plurality being implemented as a RRAM array constituted of cells, each column of the array being associated with a synapse and each row of the array being associated with an instance of the set of synaptic coefficients, the cells of a row of the RRAM being programmed during a SET operation with respective programming current intensities, the programming intensity of a cell being derived from the median value of a Gaussian component obtained by GMM decomposition into Gaussian components of the marginal posterior probability of the corresponding synaptic coefficient, once the BNN model has been trained on a training dataset.

Bayesian neural network with resistive memory hardware accelerator and method for programming the same

The present disclosure relates to a routing circuit for routing signals between neuron circuits of an artificial neural network, the routing circuit comprising: a first memory cell () having an input coupled to a first input line () of the routing circuit and an output coupled to a first column line (); a second memory cell () having an input coupled to a second input line () of the routing circuit and an output coupled to the first column line (); and a first comparator circuit () configured to compare a signal (IREAD) on the first column line () with a reference level, and to selectively assert a signal (VOUT) on a first output line () of the routing circuit based on the comparison.

Neuromorphic architecture

A method for training a logistic regression classifier on a dataset by using a resistive RAM as hardware accelerator, each row of the resistive RAM including cells which can be programmed in a first resistance state or a second resistance state. The probability of a data element belonging to a class is modelled by a logistic function applied to a score of the element, where is a parameter vector of the model. The logistic regression classifier is trained by populating the resistive RAM with samples of a model parameter vector which are obtained by MCMC sampling. Once populated, the resistive RAM can be used for classifying new data.

Method of training a logistic regression classifier with a resistive random access memory

A memory programming circuit for programming a non-volatile memory device having an array structure includes a plurality of rows, each row having a row index and comprising one or more memory units, each memory unit being configured to receive one or more input signals and to deliver one or more output signals, the memory programming circuit comprising: a first source line connected to the top electrode of the memory units comprised at rows of odd row indices, and a second source line connected to the top electrodes of the memory units comprised at rows of even row indices.

Non-volatile memory programming circuit and a method of programming non-volatile memory devices

A programmable artificial neuron emitting an output signal controlled by at least one control parameter, includes, for each control parameter, a capacitor and at least one block including at least one multiplexer configured to be in two states: a programming state and an operating state; a transistor; and a non-volatile resistive random access memory connected in series with the transistor, the capacitor and the resistive random access memory being mounted in parallel. The multiplexer is configured to, when it is in the programming state, set a resistance value of the resistive random access memory to set the value of the control parameter; when it is in the operating state, conserve the set resistance value of the resistive random access memory.

Growing community of inventors

Grenoble, France

Thomas Dalgaty