Lam Research Corporation

Aruba Networks, Inc.

Thomas D Nguyen

Gururaj Govindasamy

George A Mueller

Hogan Lew

Keyvan Khajehnouri

Douglas L Keil

Lumin Li

Helen H Zhu

Kenneth S Mak

Graham W Hills

Jeffrey L Pochop, Jr

Jonathan Burke

Wen-Ben Chou

Jerry Martinson

Joseph McArdle

Guang-Yaw Hwang

Yu-Wei Yang

Onno Harms

Nicholas F Talesfore

Timothy Tran

Peter McGrath

David Fraticelli

A computer readable medium includes instructions which cause performance of operations to configure an access point, including receiving, by a wireless communication controller, wireless communication signals detected by a wireless communication antenna. The access point includes the wireless communication antenna, the wireless communication controller, and a System-On-Chip (SOC) having a serial port configured for receiving input from the wireless communication controller. The wireless communication signals include configuration commands. The operations further include generating, by the wireless communication controller, serial signals based on the wireless communication signals, the serial signals including the configuration commands. The operations further include receiving, by the SOC from the wireless communication controller, the serial signals including the configuration commands in the wireless communication signals detected by the wireless communication antenna, and configuring the access point based on the configuration commands received in the wireless communication signals detected by the wireless communication antenna.

Accessing serial console port of a wireless access point

According to one embodiment of the invention, an apparatus comprises a heat dissipation unit, such as a heat sink, that encases wireless logic in order to completely surround such logic. When adapted as a wireless network device, a casing further encases the heat dissipation unit. The casing includes a plurality of slots that are aligned with heat-radiating elements positioned around the periphery of the heat dissipation unit to allow for cooling by convection.

Heat dissipation unit for a wireless network device

Wireless network device

Digital network device

Improved coupler for Ethernet over twisted pair. An improved coupler has a first common mode choke for connecting an Ethernet PHY to the primary winding of a transformer. The secondary winding of the transformer connects through a second common mode choke for connection to a twisted pair line. In one embodiment, the first common mode choke, transformer, and second common mode choke are placed in the same package. In a second environment, a plurality of choke-transformer-choke units are placed in the same package. In a third embodiment, the plurality of choke-transformer-choke units may be integrated into a connector. Pairs of the second common mode chokes may share cores.

Ethernet coupling

A method for etching a barrier material on a semiconductor substrate is disclosed. The method includes placing the substrate in a plasma processing chamber of the plasma processing system, wherein the substrate includes the barrier material and a low-k material, and wherein the barrier material and a low-k material are configured to be exposed to a plasma. The method also includes flowing an etchant gas mixture, including CHF from about 4% to about 8% of a plasma gas flow, into the plasma processing chamber, wherein the etchant gas mixture is configured to etch the barrier material at a first etch rate, the etchant gas mixture is configured to etch the low-k material at a second etch rate, wherein the first etch rate is substantially greater than the second etch rate. The method further includes striking a plasma from the etchant source gas; and etching the barrier layer and the low-k layer.

Methods and apparatus for the optimization of highly selective process gases

A system for processing a wafer includes a cleaning module configured to only clean the back side of the wafer so as to remove unwanted particles therefrom before performing subsequent processing tasks on the process side of the wafer. The system also includes a processing module configured to perform processing tasks on the process side of the wafer. The processing module includes a chuck for supporting the wafer during the processing task. The system further includes a transport module configured to remove the cleaned wafer from the cleaning module, move it to the processing module and place it on the chuck of the processing module without performing any intervening manipulations during the movement.

Method and apparatus for reducing He backside faults during wafer processing

A method and system for processing a wafer is disclosed. The method includes receiving a wafer having a process side and a backside. The method further includes removing un-wanted particles from the backside of the wafer to prevent gaps from forming between the backside of the wafer and a chucking surface. The method also includes performing a specific processing task on the process side of the wafer after cleaning the backside of the wafer.

Improved methods and apparatus for chemically assisted etch processing in a plasma processing system are disclosed. In accordance with one aspect of the invention, improved techniques suitable for performing an etch process in the plasma processing can be realized. The invention operates to reduce the critical dimension bias that is associated with the etch process. Lower critical dimension bias provides many benefits. One such benefit is that features with higher aspect ratio can be etched correctly. In addition, several other undesired effects, e.g., micro loading, bowing and passivation, can be curtailed using the techniques of the present invention.

Techniques for improving etching in a plasma processing chamber

A method of etching an oxide layer in a plasma etching reactor is disclosed. The method includes the steps of providing a semiconductor substrate including the oxide layer into the plasma etching reactor and flowing an etching gas that includes a fluorocarbon gas, a nitrogen reactant gas, an oxygen reactant gas, an inert carrier gas, and a hydrogen-containing additive gas into the plasma etching reactor. The method further includes etching an opening at least partially through the oxide layer using a plasma that is formed from the etching gas.

Mechanism for bow reduction and critical dimension control in etching silicon dioxide using hydrogen-containing additive gases in fluorocarbon gas chemistry

A semiconductor manufacturing process wherein deep and narrow 0.6 micron and smaller openings are plasma etched in doped and undoped silicon oxide. The etching gas includes fluorocarbon, oxygen and nitrogen reactants which cooperate to etch the silicon oxide while providing enough polymer build-up to obtain anisotropically etched openings and avoid etch stop of etched openings having aspect ratios of 5:1 and higher. The process is useful for etching 0.25 micron and smaller contact or via openings and can be carried out in a parallel plate plasma reactor having a showerhead electrode.

Method for etching silicon dioxide using fluorocarbon gas chemistry

Disclosed is a method for improving the selectivity of dielectric layers to photoresist layers and base layers. The method is performed in a plasma processing chamber, and the photoresist layer is coated over the dielectric layer. The method includes introducing an etchant source gas into the plasma processing chamber, which consists essentially of a CxFy gas and an N.sub.2 gas. The method further includes striking a plasma in the plasma processing chamber from the etchant source gas. The method additionally includes etching at least a portion of the dielectric layer with the plasma through to a base layer that underlies the dielectric layer. The method is also well suited for anisotropically etching an oxide layer with very high selectivities to Si, Si.sub.3 N.sub.4, TiN, and metal silicides.

Growing community of inventors

Campbell, CA, United States of America

Thomas D Nguyen