Texas Instruments Corporation

Thomas Cougar Van Eaton

Patrick Michael Teterud

Bryan E Bloodworth

Jiangfeng Wu

The present invention discloses an apparatus () comprising a common mode generator circuit () coupled to a current directing circuit adapted to provide current to a first write head connection node () and to a second write head connection node (). The common mode generator circuit () is adapted to provide additional current to the first write head connection node () and to the second write head connection node (), wherein the first write head connection node () is adapted to produce a first write signal, wherein the second write head connection node () is adapted to produce a second write signal, wherein the current and the additional current are adapted to establish a voltage across the first write head connection node () and the second write head connection node (), wherein the voltage is adapted to be pulled toward a first polarity based on the first write signal and toward a second polarity based on the second write signal, and wherein the voltage pulled toward the first polarity and the voltage pulled toward the second polarity are substantially centered about a common mode voltage.

Hard disk drive preamplifier write driver

An ultra-fast drive circuit ( ) providing a rail-to-rail drive voltage at an output node (N ). A pair of bipolar output transistors (Q , Q ) are selectively driven via a FET drive circuit ( ), and by a control circuit ( ) to achieve a rail-to-rail output voltage (V &minus;V ) that is very fast. The drive FETs comprise three serially connected FETs (M , M , M ) whereby the middle FET (M ) is the control FET effecting the control of the output transistors (Q , Q ). The other two FETs (M , M ) are always in the on state and complete either the pull-up or pull-down of the voltage at the output node (N ), depending on the state of the middle FET (M ). The control FETs ( ) provide two output control signals ( ) to the output transistors (Q , Q ), with the control line ( ) controlling the state of the middle switching FET (M ).

Ultra-fast voltage drive

A HDD write driver circuit ( ) having two sets of boost devices (Q , M , and Q , M ) which are temporarily turned on during a current reversal to boost the normal current and increase the differential transient voltage across the coil (LS) while decreasing the TRTF. During a current reversal cycle, one set of transistors is turned on while the other set is left off. The on set to pulls the node at one end of the coil substantially to the positive rail, and pulls the other node at the other end of the coil substantially to the lower rail (V ). The boost FETs (M , M ) are preferably large PMOS devices that must be driven hard to achieve a quick transient switching time. Advantageously, when one of the PMOS FETs (M , M ) are on, the associated series resistor (RS) is bypassed. The voltage at nodes HX and HY are no longer limited by an IR voltage drop associated with a resister (RS) therefore increasing the differential transient voltage across nodes HX and HY by increasing the maximum transient voltage of the pull-up node. Preferably, each node (HX, HY) of the coil (LS) can be pulled to within 0.2 volts of the positive rail.

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Wylie, TX, United States of America

Thomas Cougar Van Eaton