Infineon Technologies Ag

Infineon Technologies Austria Ag

Thomas Christian Neidhart

Hans-Joachim Schulze

Johannes Baumgartl

Ingo Muri

Iris Moder

Oliver Hellmund

Peter Irsigler

Thomas Grille

Hermann Gruber

Ursula Hedenig

Vijaye Rajaraman

Berthold Astegher

Lars Mueller-Meskamp

Gerhard Schmidt

Jonathan Silvano De Sousa

Manfred Kotek

Christian Krenn

Guenter Schagerl

Jacob Tillmann Ludwig

Markus Harfmann

Francisco Javier Santos Rodriguez

Rainer Leuschner

Matthias Stecher

Werner Schustereder

Bernhard Goller

Ravi Keshav Joshi

Alexander Breymesser

Bernhard Jakoby

Thomas Krotscheck Ostermann

Franz Josef Niedernostheide

Kamil Karlovsky

Karl Mayer

Peter Zorn

Alexander Susiti

Ventsislav M Lavchiev

Christine Moser

A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuitry that operates in a first voltage domain, a second region including second circuitry that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Transferring information across a high voltage gap using capacitive coupling with DTI integrated in silicon technology

A semiconductor device includes a semiconductor substrate having a first dopant and a second dopant. A covalent atomic radius of a material of the semiconductor substrate is i) larger than a covalent atomic radius of the first dopant and smaller than a covalent atomic radius of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than the covalent atomic radius of the second dopant. The semiconductor device further includes a semiconductor layer on the semiconductor substrate and semiconductor device elements in the semiconductor layer. A vertical concentration profile of the first dopant decreases along at least 80% of a distance between an interface of the semiconductor substrate and the semiconductor layer to a surface of the semiconductor substrate opposite to the interface.

Semiconductor device having semiconductor device elements in a semiconductor layer

A multi-voltage domain device includes a semiconductor layer including a first main surface, a second main surface arranged opposite to the first main surface, a first region including first circuity that operates in a first voltage domain, a second region including second circuity that operates in a second voltage domain different than the first voltage domain, and an isolation region that electrically isolates the first region from the second region in a lateral direction that extends parallel to the first and the second main surfaces. The isolation region includes at least one deep trench isolation barrier, each of which extends vertically from the first main surface to the second main surface. The multi-voltage domain device further includes at least one first capacitor configured to generate an electric field laterally across the isolation region between the first region and the second region.

Transferring information across a high voltage gap using capacitive coupling with dti integrated in silicon technology

Transfering informations across a high voltage gap using capacitive coupling with DTI integrated in silicon technology

A method of manufacturing a semiconductor device includes providing a semiconductor substrate having opposing first and second main surfaces and first and second dopants. A covalent atomic radius of a material of the substrate is i) larger than a covalent atomic radius of the first dopant and smaller than that of the second dopant, or ii) smaller than the covalent atomic radius of the first dopant and larger than that of the second dopant. A vertical extension of the first dopant into the substrate from the first main surface ends at a bottom of a substrate portion at a first vertical distance to the first main surface. The method further includes forming a semiconductor layer on the first main surface, forming semiconductor device elements in the semiconductor layer, and reducing a thickness of the substrate by removing material from the second main surface at least up to the substrate portion.

Semiconductor device and manufacturing method

A semiconductor device includes a first epitaxial layer, a second epitaxial layer disposed below the first epitaxial layer, a conductive layer disposed below and directly contacting the second epitaxial layer, and a plurality of spacers disposed between the second epitaxial layer and the conductive layer. The conductive layer includes a metal. The plurality of spacers include a bulk semiconductor material.

Devices with backside metal structures and methods of formation thereof

A semiconductor device includes a trench extending through a semiconductor substrate and an epitaxial layer disposed over a first side of the semiconductor substrate. The epitaxial layer partially fills a portion of the trench. The semiconductor device further includes a back side metal layer disposed over a second side of the semiconductor substrate. The back side metal layer extends into the trench and fills the remaining portion of the trench. The epitaxial layer partially filling the trench contacts the back side metal layer filling the remaining portion within the trench.

In accordance with an embodiment of the present invention, a method of fabricating a semiconductor device includes forming openings partially filled with a sacrificial material, where the openings extend into a semiconductor substrate from a first side. A void region is formed in a central region of the openings. An epitaxial layer is formed over the first side of the semiconductor substrate and the openings, where the epitaxial layer covers the void region. From a second side of the semiconductor substrate opposite to the first side, the semiconductor substrate is thinned to expose the sacrificial material. The sacrificial material in the openings is removed and the epitaxial layer is exposed. A conductive material is deposited on the exposed surface of the epitaxial layer.

Method of wafer thinning and realizing backside metal structures

A sensor and methods of making a sensor are disclosed. The sensor may include a substrate including an opening, an optical source disposed in the substrate and configured to generate an optical source signal, an optical detector disposed in the substrate so that the opening is disposed between the optical source and the optical detector, a plurality of optical cavity structures disposed in the opening wherein each of the plurality of optical cavity structures contains an enclosed cavity so that the respective enclosed cavities are not in gas communication with each other, wherein the plurality of optical cavity structures are arranged in an optical path between the optical source and the optical detector, and a processing circuit coupled to the optical detector and configured to process an optical signal received by the optical detector.

Photonic crystal sensor structure and a method for manufacturing the same

A method of fabricating a semiconductor device includes forming trenches filled with a sacrificial material. The trenches extend into a semiconductor substrate from a first side. An epitaxial layer is formed over the first side of the semiconductor substrate and the trenches. From a second side of the semiconductor substrate opposite to the first side, the sacrificial material in the trenches is removed. The trenches are filled with a conductive material.

A lithium ion battery includes a first substrate having a first main surface, and a lid including an insulating material. The lid is attached to the first main surface of the first substrate, and a cavity is defined between the first substrate and the lid. The lithium ion battery further includes an electrical interconnection element in the lid, the electrical interconnection element providing an electrical connection between a first main surface and a second main surface of the lid. The lithium ion battery further includes an electrolyte in the cavity, an anode at the first substrate, the anode including a component made of a semiconductor material, and a cathode at the lid.

Lithium ion battery, integrated circuit and method of manufacturing a lithium ion battery

A sensor and methods of making a sensor are disclosed. The sensor may include a substrate, an optical source, an optical detector, a plurality of optical cavities in the substrate or in a layer structure over the substrate, where the plurality of optical cavities may be arranged in an optical path between the optical source and the optical detector, and a processing circuit coupled to the optical detector and configured to receive a signal representing an optical signal received by the optical detector.

A semiconductor arrangement is produced by providing a semiconductor carrier of a second conduction type and epitaxially growing a first semiconductor zone of a first conduction type on the carrier. The first semiconductor zone includes a semiconductor base material doped with first and second dopants which are made of different substances which are both different from the semiconductor base material. The first dopant is electrically active and causes a doping of the first conduction type in the semiconductor base material, and causes a decrease or an increase of a lattice constant of the first semiconductor zone. The second dopant causes one or both of hardening of the first semiconductor zone and an increase of the lattice constant of the first semiconductor zone if the first dopant causes a decrease, or a decrease of the lattice constant of the first semiconductor zone if the first dopant causes an increase.

Method of producing a semiconductor arrangement

A sensor system having a multi-pass interaction region is disclosed. The system includes an input region, a multi-pass region, and an output region. The input region is configured to receive emitted light. The multi-pass region is coupled to the input region and is configured to absorb portions of the emitted light according to a specimen proximate the multi-pass region. The output region is coupled to the multi-pass region and is configured to provide interacted light from the multi-pass region.

Liquid sensing systems and methods using a ring resonator sensor

One embodiment describes a method of manufacturing a semiconductor device. Here, impurities are implanted into a semiconductor body via a first side of the semiconductor body. Thereafter, a drift zone layer on the first side of the semiconductor body is formed. The following is an ablation of the semiconductor body from a second side of the semiconductor body and up to pn junction defined by impurities.

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Klagenfurt, Austria

Thomas Christian Neidhart