Advantest Test Solutions, Inc.

Alcatel Lucent

Alcatel-lucent USA Inc.

Alcatel USA Sourcing, L.p.

Echelon Corporation

Alcatel IP Networks, Inc.

Thomas Carleton Jones

Mike K Noll

Akhil Duggal

Nelson Willhite

Robert Steven Martin

Craig Lindberg

Srinivas Komidi

Samer Kabbani

Karthik Ranganathan

Gregory Cruzan

Paul Ferrari

Todd Berk

Mohammad Ghazvini

Ikeda Hiroki

Kiyokawa Toshiyuki

Ian Williams

A stand-alone active thermal interposer device for use in testing a system-in-package device under test (DUT), the active thermal interposer device includes a body layer having a first surface and a second surface, wherein the first surface is operable to be disposed adjacent to a cold plate, and a plurality of heating zones defined across a second surface of the body layer, the plurality of heating zones operable to be controlled by a thermal controller to selectively heat and maintain respective temperatures thereof, the plurality of heating zones operable to heat a plurality of areas of the DUT when the second surface of the body layer is disposed adjacent to an interface surface of the DUT during testing of the DUT.

Active thermal interposer device

Testing system including active thermal interposer device

An electronic device including a multi-protocol serial nonvolatile memory interface is disclosed. The interface includes: a first line operative to perform functions of a first chip select line when the interface operates as a SPI of the electronic device; a second line operative to perform functions of a second chip select line when the interface operates as the SPI of the electronic device; a third line operative to perform functions of a clock line when the interface operates as either the SPI or an I2C interface of the electronic device, and a fourth line configured to perform functions of a mast-out-slave-in (MOSI) line and a master-in-slave-out (MISO) line when the interface operates as the SPI of the electronic device, the fourth line further operative to perform functions of a serial data line when the interface operates as the I2C interface of the electronic device.

Multi-protocol serial nonvolatile memory interface

A method and apparatus for detecting a queue depth of a memory queue in a memory system is described. The method includes estimating a start position of the queue by examining a portion of a queue start identifier of the memory queue, estimating an end position of the queue by examining a portion of a queue end identifier of the memory queue, and utilizing the start position and the end position to estimate the queue depth of the memory queue. The apparatus applies the method. One embodiment of the method and apparatus may be suitable for implementation on look-up tables of field general programmable gate arrays.

Method and apparatus for queue depth detection in a memory system

Network data switching includes receiving a cell; associating the cell with a destination port; selecting, based at least in part on a mapping of a plurality of output ports and a plurality of egress links, a selected egress link that has been soft configured to be associated with the destination port, wherein each of the plurality of egress links is configured to send data from a switch fabric to a corresponding access node; and switching the cell to the selected egress link.

Data switching using soft configuration

Transferring data via a switch fabric comprises: for each unit of data to be transferred, selecting one of a plurality of links from a fabric access node to the switch fabric to transfer the unit of data, and in the event that one or more of the plurality of links become unavailable, such that one or more remaining links remain available for transferring data, transferring a subsequently received unit of data via one of the remaining links.

Network data re-routing

Bounding cell reorder depth is disclosed. It is determined whether a reorder buffer that is associated with a switch fabric exceeds a depth limit. In the event that the reorder buffer exceeds the depth limit, backpressure with respect to a source associated with the reorder buffer is sent. In such cases source based back pressure information is included in a reserved field in a cell that is being sent into the switch fabric. In the event that the reorder buffer does not exceed the depth limit, the cell is sent to the switch fabric. In such cases the reserved field is present in the cell but is unused.

Fabric access integrated circuit configured to bound cell reorder depth

Network data switching comprises receiving a cell, associating the cell with a destination port, selecting an egress link that has been soft configured to be associated with the destination port, and switching the cell to the selected egress link. A network switch comprises an ingress link configured to receive a cell and a switch circuit coupled to the ingress link, configured to associate the cell with a destination port, to select an egress link that has been soft configured to be associated with the destination port, and to switch the cell to the egress link.

A technique for providing access to a switch fabric is disclosed. In some embodiments, the method comprises determining scheduling information specific to a link to the switch fabric and using the scheduling information to determine a queue to be serviced by the link. In some embodiments, the system comprises a buffer configured to store a plurality of queues, and a queue scheduler associated with the buffer and configured to determine scheduling information specific to a link to the switch fabric and use the scheduling information to select one of the plurality of queues as the next queue to be serviced by the link.

Switch fabric access scheduler

A fabric access device having a plurality of system interfaces is disclosed. The fabric access device includes a fabric interface configured to receive data from and send data to a switch fabric and a routing circuit configured to send data received on one of the plurality of system interfaces to the switch fabric via the fabric interface. The inclusion of a plurality of system interfaces facilitates a variety of configurations that provide different levels of redundancy and optimize use of available bandwidth.

Growing community of inventors

San Jose, CA, United States of America

Thomas Carleton Jones