Stmicroelectronics (crolles 2) Sas

Stmicroelectronics (rousset) Sas

Commissariat &#xc0; L'&#xc9;nergie Atomique Et Aux &#xc9;nergies Alternatives

Thomas Cabout

Abderrezak Marzaki

Arnaud Regnier

Stephan Niel

Quentin Hubert

Elisa Vianello

Benoit Froment

An integrated circuit includes a semiconductor substrate having a first type of conductivity and a semiconductor component. The semiconductor component includes: a buried semiconductor region having a second type of conductivity opposite to the first type of conductivity; a first gate region and a second gate region each extending in depth from a front face of the semiconductor substrate to the buried semiconductor region; a third gate region extending in depth from the front face of the semiconductor substrate and being electrically connected to the buried semiconductor region; and an active area delimited by the first gate region, the second gate region and the buried semiconductor region.

Semiconductor integrated circuit component

A capacitive element includes a trench extending vertically into a well from a first side. The trench is filled with a conductive central section clad with an insulating cladding. The capacitive element further includes a first conductive layer covering a first insulating layer that is located on the first side and a second conductive layer covering a second insulating layer that is located on the first conductive layer. The conductive central section and the first conductive layer are electrically connected to form a first electrode of the capacitive element. The second conductive layer and the well are electrically connected to form a second electrode of the capacitive element. The insulating cladding, the first insulating layer and the second insulating layer form a dielectric region of the capacitive element.

Integrated circuit with vertically structured capacitive element, and its fabricating process

A method for determining programming parameters for programming a resistive random access memory switching from an OFF state to an ON state, the method including determining retention curves representing the increase in the ON state resistance as a function of time, for a given programming temperature and a given current limitation; determining a retention failure time for each of the retention curves; determining curves representing the decrease in the retention failure time as a function of the programming temperature, for a given current limitation; for at least one given programming temperature, determining, from the curves representing the decrease in the retention failure time, a current limiting value to be applied to the resistive random access memory in order to obtain a target retention failure time.

Method for determining programming parameters for programming a resistive random access memory

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Grenoble, France

Thomas Cabout