The Titan Corporation

Thomas C Reiner

Krishnanand Kelkar

Giuseppe Carlucci

Mark J Lindsey

Stephen R Schossow

Disclosed are compounds having the following structure:CDK-L-(X),where CDK is a CDK4/6 inhibitor group, L is a linking group, X is a radiolabel or hydrogen, n is 1, 2, 3, 4, or 5, and when there are a plurality of X groups, at least one X is a radiolabel. Also described are methods of making and using the compounds. The compounds may be used in PET imaging to quantify CDK4/6 expression in cancers and to treat cancer patients exhibiting tumors which express CDK4/6.

Non-invasive pet imaging of CDK4/6 activation in cancer

In a data processing system, stored data that is essential to a given data processing operation, such encryptographic key generation, is tamper proof in that if such data is altered, processing of the altered data is inhibited upon retrieval. The system includes a memory for storing a plurality of data bits and in which the storage of one type of the bits is irreversible; a data processor, such as a cryptographic processor, coupled to the memory for retrieving the bits from a first section of the memory and for processing the retrieved bits with other data bits; an authentication unit coupled to the memory for processing the bits stored in the first section of the memory with bits stored in a second section of the memory to provide an indication as to whether or not the bits stored in the first section of the memory have a predetermined relationship to the bits stored in the second section of the memory; and a gate coupled to the data processor and to the authentication unit for inhibiting the data processor from processing the data bits retrieved from the first section of the memory unless the authentication unit indicates that the bits stored in the first section of the memory have the predetermined relationship to the bits stored in the second section of the memory. Since storage of one type of the bits is irreversible, although a pirate can alter the logic state of one type of bit in one section of the memory, he cannot alter the the logic state of the other type of bit in the other of the memory so as restore the predetermined relationship between the bits in the first section of the memory and the bits in the second section of the memory.

Tamper-proof data storage

A decoding system for decoding a digital data stream that has been convolutionally encoded in accordance with a selected constraint length and selected polynomial codes, which system includes a processor, such as a Viterbi decoder, that is reconfigurable so that it can decode encoded digital data streams for a number of different user channels for which data streams have been convolutionally encoded in accordance with respectively different combinations of selected constraint length and selected polynomial codes. The decoding system includes a Viterbi decoder for processing the encoded data stream in accordance with said selected constraint length and in accordance with said selected polynomial codes to decode the encoded data stream; a RAM for storing data of said selected constraint length and data of said selected polynomial codes in accordance with which said data stream was encoded; and a RAM I/O interface circuit responsive to a user channel identification signal for retrieving said selected constraint length data and said selected polynomial code data from the RAM and configuring the Viterbi decoder in accordance with said selected constraint length and said selected polynomial codes. In order to accommodate concurrent multiple user channels, the RAM stores different sets of combinations of constraint length data and polynomial code data corresponding to different user channels, with said different sets being retrievable from the RAM in response to respectively different user channel identification signals. The polynomial code data and constraint length data in the RAM may be changed from time to time in response to software instructions, as user channel requirements change. The Viterbi decoder processes said encoded data stream over a plurality of decoding cycles and produces intermediate decoding results during different decoding cycles; and the RAM I/O interface circuit stores in the RAM said intermediate decoding results produced for each different user channel during the different decoding cycles.

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Carlsbad, CA, United States of America

Thomas C Reiner