California Institute of Technology

USA as Represented by Secretary of the Navy

Thomas C McGill

Zvonimir Z Bandic

Eric C Piquette

Robert A Beach

Paul M Bridger

Robert P Strittmatter

Harold J Levy

James O McCaldin

Mark C Phillips

Michael W Wang

Douglas A Collins

George O Papa

Robert A Scranton

Jan R Soderstrom

An integrated micropump or a plurality of integrated micropumps are communicated to a plurality of analysis chambers. A plurality of integrated analysis chambers include integrated analysis devices to test a fluid for an analyte. The micropumps continuously or periodically pump the fluid into the analysis chambers and flush the analysis chambers after analysis of the analyte. In one embodiment, the analysis device comprises an integrated LED and an integrated optical detector. The LED and detector are tuned to an optical absorption line of the analyte. The micropumps are composed of nitrides of B, Al, Ga, In, Tl or combinations thereof and fabricated using photoelectrochemical techniques. The analysis chambers, and micropumps including the analysis devices are simultaneously fabricated during which fabrication of the micropumps and the analysis devices are masked from the photoelectrochemical techniques.

Integrated micropump analysis chip and method of making the same

An integrated microsensor includes a bowed micromachined membrane coupled to a substrate to define a microcavity therebetween. An integrated strain sensor is coupled to the micromachined membrane to generate a signal responsive to (deformation of the membrane and hence responsive to the pressure of the fluid in the microcavity. A frame is coupled to the peripheral edge of the membrane to assist in enlarging the microcavity. The membrane is composed of a nitride of B, Al, Ga, In, Tl or combinations thereof, or more particularly of p-type GaN where the frame is comprised of n-type GaN. The membrane and frame are fabricated using a photoelectrochemical etching technique. The fabrication of the integrated strain sensor creates stresses across the membrane. The strain sensor comprises an integrated circuit strain-FET. The strain-FET comprises an AlGaN/GaN heterostructure having an AlGaN/GaN interface where deformation of the membrane is coupled as strain to the AlGaN/GaN piezoelectric interface.

Semiconductor nitride pressure microsensor and method of making and using the same

A Schottky rectifier has multiple stages with substantially identical or very similar structures. Each stage includes a nitride-based semiconductor layer, a Schottky contact formed on one surface of the semiconductor layer, and an ohmic contact formed on an opposite surface of the semiconductor layer. The Schottky layer is formed from a metallic material with a high metal work function, and the ohmic contact is formed from a metallic material with a low metal work function. At least one of the stages is a middle stage located between two adjacent stages, such that the Schottky contact of the middle stage and the ohmic contact of one of the adjacent stages are joined together, and such that the ohmic contact of the middle stage and the Schottky contact of another one of the adjacent stages are joined together.

Multiple stage high power diode

A suspended p-GaN membrane is formed using photochemical etching which membrane can then be used in a variety of MEMS devices. In the illustrated embodiment a pump is comprised of the p-GaN membrane suspended between two opposing, parallel n-GaN support pillars, which are anchored to a rigid substrate below the pillars. The p-GaN membrane bows upward between the pillars in order to relieve stress built up during the epitaxial growth of membrane. This bowing substantially increases the volume of the enclosed micro-channel defined between membrane and substrate below. The ends of membrane are finished off by a gradual transition to the flat underlying n-GaN layer in which fluidic channels may also be defined to provide inlet and outlet channels to microchannel. A traveling wave or sequential voltage applied to the electrodes causes the membrane to deform and provide a peristaltic pumping action in the microchannel.

Method of manufacture of a suspended nitride membrane and a microperistaltic pump using the same

A proximity lithography device using a modified electric field. In the preferred embodiment, the modified electric field is formed by illuminating a tip of a scanning probe in close proximity of the resist surface with a laser. In an alternate embodiment, the modified electric field is formed by positioning a tip of a scanning probe within close proximity of the resist surface, where illumination from a laser is in total internal reflection within the resist. The proximity of the tip to the resist surface creates a tunneling effect and forms the modified electric field. The modified electric field alters the resist for lithographic patterning.

Proximity lithography device

High power thyristor-type devices comprising a first layer of p-type doped semiconductor alloy aluminum gallium nitride, a second layer of n-type doped aluminum gallium nitride with lower aluminum content than the first layer, a third layer of p-type doped aluminum gallium nitride with a higher aluminum content than the second layer, and a fourth layer of aluminum gallium nitride of n-type doping. The difference in hole and electron energies (band offsets) across the interface between aluminum gallium nitride and gallium nitride are such that hole and electron transfer are enhanced from aluminum gallium nitride to gallium nitride, or hole and electron transfer are suppressed from gallium nitride to aluminum gallium nitride. Aluminum content in layers 1 and 2 is chosen such that hole transfer in the forward biased conduction state of the device is enhanced, and suppressed in the reverse biased blocking state of the device. Aluminum content in layers 2 and 3 is chosen such that hole transfer in the forward biased blocking state of the device is suppressed, which reduces leakage current and enhances hole transfer into layer 2 when the device is changing from the forward biased blocking state to the forward biased conduction state. Triggering of the device may be provided by a gate contact to the third layer. Various exemplary embodiments are disclosed.

High power devices based on gallium nitride and aluminum gallium nitride

A Schottky high power rectifier having a nitride insulator formed on the surface of a GaN substrate. The nitride insulator increases the electric field breakdown suppression at or near the surface of the rectifier below the insulator. In a preferred embodiment, the nitride insulator is an epitaxially grown aluminum nitride insulator.

Higher power gallium nitride schottky rectifier

A transistorless memory cell for storing information as one of two possible bistable current states comprises (i) at least one first transistorless device exhibiting N-type negative differential resistance, including a high-impedance region, a low-impedance region and a negative-resistance region and having a polarity and (ii) at least one second transistorless device exhibiting an exponential or linear current-voltage characteristic and coupled to the first transistorless device. The read/write operation of the transistorless memory cell is performed in a current mode. A method for fabricating a self-aligned, three-dimensional structure of memory cells comprises the steps of (i) forming a first conducting layer, (ii) forming a first semiconductor layer above the first conducting layer, (iii) forming a second semiconductor layer above the first semiconductor layer, (iv) patterning the second semiconductor layer, (v) etching the second semiconductor layer, the first semiconductor layer and the first conducting layer, (vi) forming a second conducting layer above the second semiconductor layer, (vii) patterning and etching the second conducting layer, and (viii) etching the second semiconductor layer using the second conducting layer as a mask to form multiple semiconducting devices of a second kind, and etching the first semiconductor layer using the second conducting layer as a mask to form multiple semiconducting devices of a first kind.

Method for fabricating transistorless, multistable current-mode memory

Methods and apparatus are provided for monitoring deposition and pre-deposition characteristics such as the growth rates, oxide desorption, surface reconstruction, anion surface exchange reaction and smoothness of the surface of rotating substrates in near real-time during molecular beam epitaxy by processing the data in the time domain and for controlling a deposition apparatus in near real-time. An apparatus for extracting the characteristics and controlling the deposition apparatus in near real-time includes the following: (a) the deposition apparatus having a rotating substrate, (b) an energy pattern generator for subjecting the substrate to a beam of energy and for producing energy patterns, (c) an imaging unit for obtaining video images of the energy patterns, video images each having pixels, (d) a data processing unit for monitoring a selected set of the pixels on each of the video images, generating time-domain data for each video image and generating deposition parameters in near real-time, and (e) a deposition control unit for controlling the deposition apparatus in response to receiving the deposition parameters in near real-time. The method of extracting the characteristics and controlling the deposition apparatus in near real-time includes the following steps: obtaining video images of energy patterns coming from the substrate, monitoring a selected set of the pixels on each video image to generate time-domain data, filtering the time-domain data in near real-time, and controlling the deposition apparatus in near real-time.

Near real-time extraction of deposition and pre-deposition

A transistorless memory cell for storing information as one of two possible bistable current states comprises (i) at least one first transistorless device exhibiting N-type negative differential resistance, including a high-impedance region, a low-impedance region and a negative-resistance region and having a polarity and (ii) at least one second transistorless device exhibiting an exponential or linear current-voltage characteristic and coupled to the first transistorless device. The read/write operation of the transistorless memory cell is performed in a current mode. A method for fabricating a self-aligned, three-dimensional structure of memory cells comprises the steps of (i) forming a first conducting layer, (ii) forming a first semiconductor layer above the first conducting layer, (iii) forming a second semiconductor layer above the first semiconductor layer, (iv) patterning the second semiconductor layer, (v) etching the second semiconductor layer, the first semiconductor layer and the first conducting layer, (vi) forming a second conducting layer above the second semiconductor layer, (vii) patterning and etching the second conducting layer, and (viii) etching the second semiconductor layer using the second conducting layer as a mask to form multiple semiconducting devices of a second kind, and etching the first semiconductor layer using the second conducting layer as a mask to form multiple semiconducting devices of a first kind, wherein the semiconducting devices of the first kind exhibit N-type negative differential resistance, and the semiconducting devices of the second kind may exhibit exponential or linear current-voltage characteristics.

Transistorless, multistable current-mode memory cells and memory arrays

n-type wide bandgap semiconductors grown on a p-type layer to form hole injection pn heterojunctions and methods of fabricating the same. In a preferred embodiment, a p-type gallium nitride substrate is used. A first layer, such as a magnesium zinc sulfide layer Mg.sub.x Zn.sub.1-x S is then deposited. Thereafter, a second layer such as an n-type zinc sulfide layer is deposited. The magnesium zinc sulfide layer forms an electron blocker layer, and preferably is adequately thick to prevent significant tunneling of electrons there through. Thus, the primary charge flow across the heterojunction is by way of holes injected into the n-type zinc sulfide region from the p-type gallium nitride region, resulting in electron-hole recombination in the zinc sulfide region to provide light emission in the wide bandgap zinc sulfide material. Alternate embodiments are disclosed.

n-type wide bandgap semiconductors grown on a p-type layer to form hole

A transistorless memory cell for storing information as one of two possible bistable current states comprises (i) at least one first transistorless device exhibiting N-type negative differential resistance, including a high-impedance region, a low-impedance region and a negative-resistance region and having a polarity and (ii) at least one second transistorless device exhibiting an exponential or linear current-voltage characteristic and coupled to the first transistorless device. The second transistorless device may be a diode or a resistor. The read/write operation of the transistorless memory cell is performed in a current mode.

Type-II semiconductor heterojunction light emitting devices formed on a substrate are described wherein a graded injection layer is used to accelerate electrons over the electron barrier formed by the junction. Further, wide band gap semiconductor LEDs and lasers are proposed formed of II-VI materials which emit light in the blue and green wavelengths. Particularly, a system composed of n-CdSe:Al/Mg.sub.x Cd.sub.1-x Se/Mg.sub.y Zn.sub.1-y Te/p-ZnTe are described where the value of y determines the wavelength of the emitted light in the green or blue region and x varies across the graded injection layer for raising the energy levels of excited electrons.

Growing community of inventors

Pasadena, CA, United States of America

Thomas C McGill