Rockwell International Corporation

Chiaro Networks Ltd

Foundry Networks, Inc.

Alcatel

Alcatel Network Systems, Inc.

Jeremy Benjamin As Receiver for Chiaro Networks Ltd.

Thomas C McDermott, Iii

Tony M Brewer

Harold Wallace Dozier

Harry C Blackmon

Dean E Walker

Gregory S Palmer

Jim Kleiner

Keith W Shaw

David Traylor

Steven Jeffrey Wallach

Chris Davies

Lou Yeh

Allen Frank Rozman

Peter O'Connell

Marc Jadoul

Christopher P Davies

Johan Pirot

Rombaut J Roscam

Instead of alternatively utilizing only one fabric or the other fabric of a redundant pair, both fabrics simultaneously transmit duplicate information, such that each packet forwarding module (PFM) receives the output of both fabrics simultaneously. In real time, an internal optics module (IOM) analyzes each information chunk coming out of a working zero switch fabric; simultaneously examines a parallel output of a working one duplicate switch fabric; and compares on a chunk-by-chunk basis the validity of each and every chunk from both switch fabrics. The IOM does this by examining forward error correction (FEC) check symbols encapsulated into each chunk. FEC check symbols allow correcting a predetermined number of bit errors within a chunk. If the chunk cannot be corrected, then the IOM provides indication to all PFMs downstream that the chunk is defective. Under such conditions, the PFMs select a chunk from the non-defective switch fabric. Under error-free normal conditions, however, the PFMs select a chunk arbitrarily from a default switch fabric. In this way, each chunk in real time is selected from a non-defective source and is thus guaranteed to be error free. Accordingly, if a switch fabric fails, no information chunks are lost anywhere in the system.

Router switch fabric protection using forward error correction

A chunk format for a large-scale, high data throughput router includes a preamble that allows each individual chunk to have clock and data recovery performed before the chunk data is retrieved. The format includes a chunk header that contains information specific to the entire chunk. A chunk according to the present format can contain multiple packet segments, with each segment having its own packet header for packet-specific information. The format provides for a scrambler seed which allows scrambling the data to achieve a favorable zero and one balance as well as minimal run lengths. There can be a random choice of available scrambler seeds for any particular chunk to avoid malicious forcing of zero and one patterns or run lengths of bit zeroes and ones. There are a chunk cyclical redundancy check (CRC) as well as forward error correction (FEC) bytes to detect and/or correct any errors and also to insure a high degree of data and control integrity. Advantageously, a framing symbol inserted into the chunk format itself allows the receiving circuitry to identify or locate a particular chunk format. 'Break Bytes' and 'Make Bytes' fields located at the beginning of a chunk preamble precondition an optical receiver to a proper state before the actual chunk arrives at the receiver.

System and method for router data aggregation and delivery

A chunk format for a large-scale, high data throughput router includes a preamble that allows each individual chunk to have clock and data recovery performed before the chunk data is retrieved. The format includes a chunk header that contains information specific to the entire chunk. A chunk according to the present format can contain multiple packet segments, with each segment having its own packet header for packet-specific information. The format provides for a scrambler seed which allows scrambling the data to achieve a favorable zero and one balance as well as minimal run lengths. There are forward error correction (FEC) bytes as well as a chunk cyclical redundancy check (CRC) to detect and/or correct any errors and also to insure a high degree of data and control integrity. Advantageously, a framing symbol inserted into the chunk format itself allows the receiving circuitry to identify or locate a particular chunk format. 'Break Bytes' and 'Make Bytes' fields located at the beginning of a chunk preamble precondition an optical receiver to a proper state before the actual chunk arrives at the receiver.

A router line card is partitioned to separate the packet forwarding functions from physical port interfacing. For each packet forwarding card, at least one redundant port interface is provided. Identical input packets are transmitted via these redundant input port interfaces, one of which is eventually selected based on, for example, SONET standard criteria. If there is a failure, the router selects the interface path that is operating properly and rejects the path containing a failed element. Thus, the router decides locally how to correct the problem internally. Moreover, following an equipment failure the now offline failed interface path can be replaced, while the equipment remains in service using the duplicated interface path. The system can be restored to full duplex operation without affecting the existing traffic, providing for a hot replacement of a failed path. Because the interfaces are separate, a failed module can be renewed and replaced while the equipment is in service. If a failure occurs in an interface card between two peer routers, then packets flow between the two routers uninterrupted from exactly the same previous ports on one router to the same previous ports on the second router, using the same Internet protocol addresses as existed prior to the switching.

Router network protection using multiple facility interfaces

A repetitive burst-mode input signal that has a dark time portion, a preamble portion, and a payload portion is converted into a limited output signal in accordance with a decision threshold level, which is controlled by selectively coupling an averaged value of the burst-mode data amplitude to the decision threshold level. The timing sequence for selectively coupling the averaged signal value is controlled such that the average value of the burst-mode signal acquired during the preamble portion of the burst-mode signal is applied to the decision threshold level during substantially all of the payload portion. The control circuit may incorporate a phase-locked loop, which locks onto the repetitive dark time frequency and in response synthesizes a switchable track enable signal that controls the timing sequence of the decision threshold level. The phase-locked loop can employ all-digital, analog, and/or hybrid digital/analog circuitry.

Fast decision threshold controller for burst-mode receiver

A multicast packet is transferred through a switching fabric from an input line card to a dedicated multicast card, which is substantially the same as an input and output line card, but without external facility interfaces. A dedicated output multicast card converts the multicast packet from an optical to an electrical packet and passes it to a dedicated input multicast card, where the packet is replicated electrically, converted back to an optical packet, and then transferred through the switching fabric to multiple destinations. In some embodiments, input and output dedicated multicast cards are actually a single card. Transfer of the multicast packet to multiple destinations occurs sequentially or simultaneously during a single switching cycle, if multiple parallel switching paths exist through the switching fabric. Some embodiments include multiple dedicated multicast cards, allowing rapid simultaneous expansion of the multicast tree.

System and method for router multicast control

Router line cards are partitioned, separating packet forwarding from external or internal interfaces and enabling multiple line cards to access any set of external or internal data paths. Any failed working line card can be switchably replaced by another line card. In particular, a serial bus structure on the interface side interconnects any interface port within a protection group with a protect line card for that group. Incremental capacity allows the protect line card to perform packet forward functions. Logical mapping of line card addressing and identification provides locally managed protection switching of a line card that is transparent to other router line cards and to all peer routers. One-for-N protection ratios, where N is some integer greater than two, can be achieved economically, yet provide sufficient capacity with acceptable protection switch time under 100 milliseconds. Alternatively, protect line cards can routinely carry low priority traffic that is interruptible, allowing the protect line card to handle higher priority traffic previously carried by a failed working line card. This approach renders unnecessary engineering a network for less than full capacity to allow rerouting in the event of individual line card failure. Consequently, all data paths can be fully utilized. If a particular interface module on one data bus needs removal for maintenance, a duplicate data bus is available intact, allowing hot replacement of any working or protect interface module, even while a line card protection switch is in effect.

Router line card protection using one-for-N redundancy

A system of controlling and managing voice and data services in a telecommunications network includes a media gateway interface coupled to a plurality of diverse voice and data media gateways operating under diverse protocols in the telecommunications network, the media gateway interface being operable to communicate service logic with the media gateways. A media gateway controller is in communications with the media gateway interface and media gateways and carries out service logic for a voice or data service according to input received from the media gateways. The system also includes a service management subsystem in communications with the media gateway controller and being operable to provision services with customers and provide service management tools for managing the services, and a service creation subsystem in communications with the service management subsystem and being operable to provide service creation tools for creating the service logic of the services. A customer care subsystem in communications with the service management subsystem is provided for generating billing records and customer invoices for the voice and data services.

System and method of controlling and managing voice and data services in a telecommunications network

In a fiber-optic communications system, a shut-down apparatus in the event of a fiber-optic cable disruption includes a first optical fiber cable for propagating signals in a first direction and having a plurality of adjacent amplifiers disposed along the first cable. A second optical fiber cable for propagating signals in a second direction, opposite the first direction, includes a plurality of adjacent amplifiers disposed along the second cable. Each of the amplifiers in the second optical fiber cable are interconnected to one of the amplifiers of the first optical fiber cable to form a plurality of amplifier pairs. Circuitry is provided for terminating operation or reducing the output power level of an amplifier within the first or second optical fiber cables in the event of a cable disruption between adjacent amplifier pairs, such that an amplifier within an amplifier pair adjacent to the cable disruption terminates generation or reduces its power level to a safe level at its output. Circuitry is further provided for generating a continuity signal on the first and second cables at the output of each of the amplifiers. Circuitry is provided for sensing the continuity signal upon elimination of the cable disruption to thereby actuate the input of the amplifier within an amplifier pair adjacent to the cable disruption to thereby automatically reestablish communication along the previously disrupted cable.

Fail-safe automatic shut-down apparatus and method for high output power

If each data channel comprising a set of multiplexed data channels contains channel identity information, a single framing detector operating on one channel can provide a framing detection operation regardless of where the search is commenced thereby avoiding a search of all of the channels to obtain framing information. By having unique tag or identity bits incorporated in each of the multiplexed data channels, the timing problems for obtaining synchronized parallel output bits from each of the channels can be logically ascertained and the channels can be rerouted and individual channels of the rerouted channels can be time delayed to obtain the time synchronization.

Method and apparatus for framing and demultiplexing multiplexed digital

Monitoring or error checking equipment for use with multiplexing circuitry at the transmission end of a communication line is disclosed which accomplishes a large reduction in circuitry by using transmitter generated low speed timing signals and clock signals to demultiplex the output data into nonsymmetrical or timing irregular data. The plurality of channels of nonsymmetrical data are then each checked for parity and framing pulses as well as clock activity by time multiplexed switching equipment on a cyclical basis.

Multiplex equipment monitoring apparatus

A delay circuit including an even number of memory devices, for example two, reading from one memory device, while writing to the other. Sequences of bit addresses are generated for writing and reading, with an offset between the sequences. For the case of two memory devices, each address sequence is applied alternately to the one and then the other memory device. Importantly, if each memory device has an even number n of storage locations, then, preferably, only (n-1) of these are used in the generated sequences of addresses. This has the result that the circuit can write to and read from all of the memory locations in the memory devices. Thus, the maximum delay possible in the circuit of the invention is nearly the total number of bits in the multiple memory devices, and the circuit is capable of handling data at the maximum operating rate of the memory devices.

Digital time delay circuit with high speed and large delay capacity

A clock system is disclosed having two identical clocks not synchronized with each other. Each of the clocks includes a circuit for selecting the output of one of the clocks as the present system output. Further, each clock includes logic for detecting errors in the operation of itself, and of the other. When an error is detected in the operation of the clock selected to be the present system output, a switchover sequence control switches the output signal of the nonselected clock to become the new system output. The switchover sequence control includes a feature which ensures that the interval between pulses in the system output is greater than a predetermined period in order to minimize detrimental effects on circuitry utilizing the clock system output.

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Plano, TX, United States of America

Thomas C McDermott, Iii