Samsung Electronics Co., Ltd.

Thomas Byunghak Cho

Sung-Jun Lee

Seung-chan Heo

Jong-woo Lee

Sang Won Son

Dooseok Choi

Siddharth Seth

Ji-Young Lee

Young-Min Kim

Young-min Kim

Jong-Soo Lee

Seung-Chul Lee

Sang-Wook Han

Dae Hyun Kwon

Joong-Ho Lee

Seung Chul Lee

Sriramkumar Venugopalan

Pil-Sung Jang

Ji Seon Paek

Tae-Hwan Jin

Jun-Hee Jung

Ji-Seon Paek

Yong Sik Youn

Pil-sung Jang

Jaehyun Lim

Joon-Hee Lee

Tae-wan Kim

Jongwon Choi

Sangwook Han

Joonhee Lee

Youngki Lee

Sunwoo Lee

Jongwoo Lee

Jong-Won Choi

Si-Bum Jun

In-yup Kang

Sun-woo Lee

Jeong-Hyun Choi

Seungchan Heo

Chia-Hsin Wu

Joung-hyun Yim

Young-Hwan Choo

Seongsik Myoung

Manthena Vamshi

Hansol Kang

Byung-Ki Han

Dae-young Yoon

Yong-Sik Youn

In-young Choi

Doo-Seok Choi

Seung-Chan Heo

A receiver includes an amplification block supporting carrier aggregation (CA). The amplification block includes a first amplifier circuit configured to receive a radio frequency (RF) input signal at a block node from an outside source, amplify the RF input signal, and output the amplified RF input signal as a first RF output signal. The first amplifier circuit includes a first amplifier configured to receive the RF input signal through a first input node to amplify the RF input signal, and a first feedback circuit coupled between the first input node and a first internal amplification node of the first amplifier to provide feedback to the first amplifier.

Radio frequency (RF) integrated circuit performing signal amplification operation to support carrier aggregation and receiver including the same

A radio frequency (RF) apparatus includes a radio frequency integrated circuit (RFIC) chip and an antenna module disposed on an upper surface of the RFIC chip. The antenna module includes a first antenna patch that is in parallel with the RFIC chip, the first antenna patch including a first penetration point, and a first power feed point connected to a first power feed line to transmit and receive a first RF signal of a first frequency band; and a second antenna patch disposed above the first antenna patch in parallel with the first antenna patch, the second antenna patch including a second power feed point connected to a second power feed line that penetrates through the first penetration point to transmit and receive a second RF signal of a second frequency band. The first penetration point is formed in a first region of the first antenna patch in which influence on an electric field generated by the first antenna patch via the first power feed point is minimized.

Antenna module and radio frequency apparatus including the same

In a method of processing an image, a first image including a plurality of objects and image information associated with the first image are obtained. Image processing information associated with an image operation to be performed on the first image is obtained based on an object among the plurality of objects included in the first image and a user command specified in at least one of voice information of a user and touch information from the user. A second image is generated by performing the image operation on the first image based on the image information and the image processing information.

Method of processing image based on artificial intelligence and image processing device performing the same

A radio frequency (RF) device may include a radio frequency integrated circuit (RFIC) chip and an antenna module on an upper surface of the RFIC chip. The antenna module may include a first patch parallel to the RFIC chip and having an upper surface configured to emit radiation in a vertical direction opposite the first patch from the RFIC chip, a ground plate parallel to the first patch, and between the first patch and the RFIC chip, and a first plurality of feed lines connected to a lower surface of the first patch and configured to supply at least one first differential signal to the first patch from the RFIC chip.

Multi-fed patch antennas and devices including the same

A method of testing a radio frequency (RF) integrated circuit includes: forming, performed by the RF integrated circuit, a test loop that passes through a first transceiver circuit, a first front-end circuit, and a second transceiver circuit, based on a test control signal transmitted from a test device; adjusting, performed by the RF integrated circuit, a shift degree of at least one phase shifter in the first front-end circuit, based on the test control circuit; and receiving, performed by the RF integrated circuit, a test input signal via the first transceiver circuit from the test device, and outputting, to the test device, the test input signal that has passed through the test loop, wherein the test input signal is output as a test output signal via the second transceiver circuit.

Method of testing RF integrated circuit

A wireless communication device for transceiving signals by using carrier aggregation is provided. The wireless communication device includes a first antenna configured to transmit a first signal to an outside of the wireless communication device or receive a second signal from the outside; a first transmitter connected to the first antenna via a first node and configured to generate the first signal by combining plural transmitting carrier signals received over a plural transmitting carriers; and a first receiver connected to the first antenna via the first node and configured to divide the second signal into a plural receiving carrier signals received over a plural receiving carriers. The first receiver includes a first receiving amplifier commonly connected to a plural carrier receivers configured to amplify the second signal received from the first antenna and to divide the receiving carrier signals, respectively.

Wireless communication device transceiving signals by using carrier aggregation in multi input multi output system

An apparatus for and method of a supply modulator (SM) for a power amplifier (PA) is provided. The apparatus includes a buck-boost converter, including a supply input connected to a battery voltage (Vbat), and an output; and a buck converter, including a supply input connected to Vbat, an input connected to the output of the buck-boost converter, and an output.

Apparatus for and method of a supply modulator for a power amplifier

A wireless terminal is provided that includes a first receiver that includes a first input unit configured to perform impedance matching on a first reception signal to output a first RF input signal. A first amplification unit is configured to amplify the first RF input signal to output one or more first RF output signals in an inter-band CA mode and an intra-band CA mode. A first output unit is configured to down-convert at least one of the one or more first RF output signals to a baseband. A second receiver includes a second output unit. In the intra-band CA mode, the one or more first RF output signals includes a first RF signal and a second RF signal, and the first amplification unit is further configured to provide the first output unit with the first RF signal and provide the second output unit with the second RF signal.

Receiver and wireless terminal for signal processing

Disclosed are a transmitter and method of combining multiple contiguous and non-contiguous frequency bands in a wireless communication system using carrier aggregation. The transmitter includes a first communication unit for converting a first baseband signal into a first RF signal of a first band, a second communication unit for converting a second baseband signal into a second RF signal of a second band, a combiner for outputting a third RF signal by combining the first RF signal and the second RF signal, and an amplifier for amplifying the third RF signal.

Transmitter and method using carrier aggregation

The present disclosure provides a method and a phase lock detection apparatus for detecting whether a phase of an output signal is locked to the phase of a reference signal. The apparatus includes a first divider that individually frequency-divides first and second pulse signals, a phase frequency detector that outputs third and fourth pulse signals that correspond to a phase difference between the frequency-divided first and second pulse signals, a second divider that individually frequency-divides the third and fourth pulse signals, and a determiner that determines whether a phase of the second pulse signal is locked, based on the frequency-divided third and fourth pulse signals.

Apparatus and method for detecting phase lock in an electronic device

An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.

Apparatus and method for dynamically biased baseband current amplifier

A wireless terminal and a receiver are provided that include a first amplifier configured to receive and amplify a first radio frequency (RF) input signal, and configured to output a first RF output signal corresponding to a first carrier included in a first frequency band. The receiver also includes a first sub amplifier configured to, when a mode signal indicates a first mode, receive a first internal signal from the first amplifier, amplify the first internal signal, and output a second RF output signal corresponding to a second carrier included in the first frequency band.

An integrated circuit (IC), a method of testing the IC, and a method of manufacturing the IC are provided. The IC includes analog circuitry, digital circuitry, at least one first connector, and a switching unit operatively coupled with the at least one first connector and configured to, if a first signal is received, couple the analog circuitry and the at least one first connector, and, if a second signal is received, couple the digital circuitry and the at least one first connector.

Hybrid chip comprising hybrid connector

A parallel output linear amplifier is provided that includes a transconductance amplifier configured to receive an analog input signal from an input terminal and amplify the analog input signal. The parallel output linear amplifier also includes a first pre-amplifier connected to the transconductance amplifier and operated using a floating drive voltage, and a cascode class AB amplifier connected to the first pre-amplifier and configured to provide an amplified signal to an output terminal. The parallel output linear amplifier further includes a second pre-amplifier configured connected to the transconductance amplifier and operated using the floating drive voltage, and a cascade class AB amplifier connected to the second pre-amplifier and configured to provide an amplified signal to the output terminal.

Parallel combined output linear amplifier and operating method thereof

Growing community of inventors

Gyeonggi-do, South Korea

Thomas Byunghak Cho