Thomson Licensing

Thomson Licensing S.a.

Interdigital Ce Patent Holdings

Thomas Brune

Michael Drexler

Oliver Kamphenkel

Siegfried Schweidler

Stefan Abeling

Axel Kochale

Tim Niggemeier

Wolfgang Klausberger

Klaus Gaedke

Ingo Hütter

Dieter Haupt

Jens Peter Wittenburg

Ralf Ostermann

Valter Drazic

Dirk Adolph

Thierry Borel

Jens Cahnbley

Oliver Theis

Malte Borsum

Herbert Schuetze

Lothar Freissmann

Herbert Schütze

Johann Maas

Michael Walden

Andrei Chevtsov

A method and an apparatus for generating lens-related metadata for a light field imaging device. An image renderer generates a display image from a light field capture using a lens model. A metadata assembler then outputs parameters of the lens model used for generating the display image as lens-related metadata for the light field imaging device.

Method and apparatus for generating lens-related metadata

The invention concerns a solid state memory, comprising multiple logical units. The solid state memory contains an internal buffer for temporarily storing the incoming data steam before the incoming data are programmed to at least one page. The internal buffer keeps data that are not yet programmed in case a switch from one logical unit to another is performed. A method for operating such a device is presented.

Solid state memory with reduced number of partially filled pages

High speed mass storage devices using NAND flash memories (MDY.X) are suitable for recording and playing back a video data stream under real-time conditions, wherein the data are handled page-wise in the flash memories and are written in parallel to multiple memory buses (MBy). However, for operating with multiple independent data streams a significant buffer size is required. According to the invention, data from different data streams are collected in corresponding different buffers (FIFO, . . . , FIFO Z) until the amount of collected data in a current buffer corresponds to a current one of the data blocks. Then, the data of the current data block from the current buffer are stored into memories connected to a current one of the memory buses, wherein the following buffered data block of the related data stream is later on stored into memories connected to a following one of the memory buses, the number of the following memory bus being increased with respect to the number of the current memory bus. These steps are repeated, also for the other ones of the data streams using other available ones of the buffers and other ones of the memory buses. In combination with a corresponding buffer control it is possible to allocate and use a minimum number of buffers in a flexible way.

Storing/reading several data streams into/from an array of memories

For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.

Method and apparatus for dealing with write errors when writing information data into memory devices

Device for real-time streaming to an array of solid state memory device sets, said device comprising receiving means for receiving data from data streams of individual data rate in parallel, an input cache for buffering received data, a bus system for transferring data from the input buffer to the solid state memory device sets, and a controller adapted for using a page-receiving-time t_r, a page-writing-time wrt_tm, the data amount p and the individual data rates for dynamically controlling the bus system such that data received from the first data stream is transferred to solid state memory device sets comprised in a first subset of said array of solid state memory device sets, only, and data received from the at least a second data stream is transferred to solid state memory device sets comprised in a different second subset of said array of solid state memory device sets, only.

Device for real-time streaming of two or more streams in parallel to a solid state memory device array

Method and apparatus for dealing with write errors when writing information data into flash memory devices

For recording or replaying in real-time digital HDTV signals very fast memories are required. For storage of streaming HD video data NAND flash memory based systems can be used. However, NAND flash memories have a slow write access, and they have unmasked production defects. Write or read operations can be carried out on complete physical data blocks only, and defect data blocks must not be used by the file system. Logical file system blocks are used which are larger than the physical data blocks. According to the invention the error reporting mechanism of the NAND flash memories is exploited. The video data is not only written to the non-volatile flash memories, but is also written to corresponding buffer slots (LFSB) of a volatile SRAM or DRAM memory operating in parallel. The video data are kept in the volatile memory until the flash memory holding the respective data has reported that its program or write operation succeeded. Once this has taken place, the data within the volatile memory can be overwritten in order to save memory capacity. If the flash memory has reported an error, the respective block (FSBD) of data is marked bad and will not be overwritten until the end of the entire recorded take has been reached. At this time, the marked video data from the volatile memory are copied to spare flash-blocks within the flash memories.

Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data I/O bus

The present invention relates to a mass storage system with improved usage of buffer capacity, and more specifically to a mass storage system for real-time data storage with an embedded controller. According to the invention, the mass storage system has a first data path between a real-time data interface and a mass storage array, the first data path including a data buffer without access latency, and a second data path between an embedded processor and the mass storage array, wherein the data buffer without access latency is also used as a data buffer for non real-time data transfers between the embedded processor and the mass storage array.

Mass storage system with improved usage of buffer capacity

The present invention relates to a redundancy protected mass storage system with increased performance, and more specifically to a mass storage system with multiple storage units. According to the invention, the resources that are essentially provided for compensating the damage of one or more storage units are also used to enhance the system performance. For this purpose during reading or writing the storage system just waits for the responses of a minimum number of required storage units to start reading or writing, respectively.

Redundancy protected mass storage system with increased performance

State of the art processor systems, esp. in embedded systems, are not able to process data under real-time conditions especially with throughput rates near 10 Gbps. So, when using interfaces like PCI Express (PCIe) or Infiniband or 10 G-Ethernet for 10 Gbps data throughput, special data-paths have to process the high throughput rate data. But tasks like connection management or time uncritical control messaging are better manageable by a processor. According to the invention it is proposed a kind of multiplexer architecture that is needed to split between control and data-path access for a PCI Express based architecture.

Device for processing a stream of data words

Two or more electronic devices are connected via a bus system building a cluster or chain of devices. A device can be selected using a control device, wherein an user interface for the selected device is generated based on description data which are stored in the selected device and are transferred to the control device. A single user interface is shown on a display of the control device which allows to operate at least two devices simultaneously. The user interface of a first device is displayed as main user interface and the user interface of a second device is rendered within the main interface as reduced user interface which includes only operation elements necessary for operation of the second device in combination with the first device.

Method for the data exchange between network devices

The present invention relates to a hand-held device comprising connection means for supporting an internet data transmission link between the hand-held device and the internet; browser means for fetching internet data from the internet; input means for receiving a user input; and generating means for generating a command script in response to said user input, where said command script is related to said searched internet data; where said command script, when the hand-held device is connected to a multimedia home device, can be processed to initiate a transmission of at least part of said searched internet data and/or other internet data to said multimedia home device.

Method for using the hand-held device in a multimedia home network

Two or more electronic devices are connected via a bus system, wherein one of the network devices controls other network devices. A first control application is uploaded from a first controlled device to the control device and a second control application is uploaded from a second controlled device into the first control application. The first and second controlled devices can be operated simultaneously using a single user interface shown on a display of the control device. The user interface of the first device is displayed as main user interface and the user interface of the second device is rendered within the main interface as reduced user interface, which includes only operation elements necessary for operation of the second device in combination with the first device. The generation of combined user interfaces is also possible when the second controlled device comprises features, which are not known at the production of the first controlled device.

Method for the control of network devices connected via a bus system

The present invention relates to a memory controller for an IC with an external DRAM, where the external DRAM has at least one memory bank and communicates with the IC via at least one channel. In line with the invention, the memory controller has a command scheduler which prioritizes the transmission of memory bank commands on the basis of a static priority allocation for commands and a dynamic priority allocation for channels.

Memory controller

For recording or replaying in real-time digital high bandwidth video signals, e.g. HDTV, HD progressive or HD film capture signals, very fast memories are required. For storage of streaming HD video data NAND FLASH memory based systems could be used. Flash memory devices are physically accessed in a page oriented mode. According to the invention, the input data are written in a multiplexed fashion into a matrix of multiple flash devices. A list processing is performed that is as simple and fast as possible, and defect pages of flash blocks of single flash devices are addressed within the matrix architecture. When writing in a sequential manner, the data content for the current flash device page of all flash devices of the matrix is copied to a corresponding storage area in an additional memory buffer. After the current series of pages has been written without error into the flash devices, the corresponding storage area in an additional memory buffer is enabled for overwriting with following page data. In case an error occurred in the current page in one or more flash devices, the content of these current pages is kept in the additional memory buffer.

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Hannover, Germany

Thomas Brune