Raytheon Company

Texas Instruments Corporation

Thomas Allan Kocian

Buu Quoc Diep

Stephen H Black

Roland W Gooch

Adam M Kennedy

Richard Lee Knipe

Mark Henry Strumpell

Tse E Wong

Gregory D Tracy

Mark Lamb

Roland Gooch

Buu Diep

Jwei Wien Liu

Allan M Kennedy

Doug Darrow

Buu Q Diep

Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.

Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays

An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

Wafer level package solder barrier used as vacuum getter

A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.

Wafer level MEMS package including dual seal ring

A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.

Hermetically sealed package having stress reducing layer

A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when the cover wafer is bonded to the device wafer.

Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling

A getter structure and method wherein a layer of seed material is deposited on a predetermined region of a surface of a structure under conditions to form a plurality of nucleation sites on a surface of the structure. The nucleation sites have an average height over the surface area of the predetermined region of less than one molecule thick. Subsequently a getter material is deposited over the surface to form a plurality of getter material members projecting outwardly from the nucleation sites.

Getter structure and method for forming such structure

A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.

Integrated bondline spacers for wafer level packaged circuit devices

In certain embodiments, a system includes a deposition system and a plasma/bonding system. The deposition system deposits a solder outwardly from a substrate of a number of substrates. The plasma/bonding system comprises a plasma system configured to plasma clean the substrate and a bonding system configured to bond the substrates. The plasma/bonding system at least reduces reoxidation of the solder. In certain embodiments, a method comprises depositing solder outwardly from a substrate, removing metal oxide from the substrate, and depositing a capping layer outwardly from the substrate to at least reduce reoxidation of the solder.

Reducing formation of oxide on solder

A method for forming a coating of material on selected portions of a surface of a substrate having a plurality of cavities, each cavity having outer, peripheral sidewalls extending outwardly from the surface. The method includes: providing a structure having a release agent thereon; contacting top surface of the wafer with the release agent to transfer portions of the release agent to the top surface of the wafer while bottom portions of the cavities remain spaced from the release agent to produce an intermediate structure; the release agent disposed on the top surface of the wafer and with the bottom portions of the cavities void of the release agent; exposing the intermediate structure to the material to blanket coat the material on both the release agent and the bottom portions of the cavities; and selectively removing the release agent together with the coating material while leaving the coating material on the bottom portions of the cavities.

Growing community of inventors

Dallas, TX, United States of America

Thomas Allan Kocian