Honeywell G.m.b.h.

Innovasic, Inc.

Thomas A Weingartner

Paul J Short

William Ray Hancock

Jennifer A Graves

Steven Edward Lindsley

Jordon W Woods

Paul E Knight

Mark A Espelien

Jesse G Fisher

Tamara G Dennison

Joseph D Clark

A method and apparatus for a fully programmable and configurable application specific integrated circuit (FPCA). Programmable I/O cells are programmed for selected electrical characteristics, including power and ground. The circuit contains a functional core for programming the circuit, programmable I/O leads to connect to the programmable I/O cells, and programming logic and control for programming the functional core and I/O cells. Certain leads double as programmable I/O leads and programming control leads, and are used to communicate with the programming logic and control and the I/O cells. A method of programming the FPCA comprises the steps of asserting the programming control signal; applying programming voltage and ground to a respective two designated I/O cells' leads; isolating a plurality of the I/O cells from the programming signal; and programming an FPGA array in addition to the isolated I/O cells of the circuit.

Fully programmable and configurable application specific integrated circuit

The virtual graphics processor is a software process that enables different video display systems to execute the same graphical display application. The process also permits the display application to be updated or reconfigured in real time without changing the embedded display system software. The parts of the virtual graphics processor include an application graphics database for storing graphic primitives and associated static primitive data defining one or more graphic pages in a display application. An image control interface (video library) associates graphic functions of the particular video display system with graphic primitives in a requested page. An instruction sequencer within the virtual graphics processor responds to a display request by obtaining the requested graphic page from the graphics database and associated graphics functions from the video library. The addresses of the graphic functions and associated data for the graphic page are passed from the instruction sequencer to an instruction queue. A graphics logic unit reads the addresses from the queue and calls the function, providing each called function with the associated data. The display system responds to the called graphics functions by displaying the requested page with its associated data on a video screen.

Virtual graphics processor for embedded real time display systems

A display memory system consisting of a controller and a display memory that has a read display memory cycle time that is a non-integer multiple of the write display memory update rate. The display memory being partitioned into two frames of display memory with each frame having a plurality of subframes. The controller consisting of a read display memory decoder, a read display memory next subframe generator a read display memory latch and consisting of a write display memory decoder, a write display memory next subframe generator and write display memory latch.

Gerbil wheel memory

Apparatus and method for providing x, y an z values so as to construct figures from unit vectors rotated in three space wherein the x, y and z values result from processing construction and rotation parameters according to the following relationships:

Method and apparatus for generating display figures with three degrees

A symbol generator useful for stroke based and raster display systems provides the ability of generating ellipses and elliptical arc segments. A look-up table provides cosine and sine values for incremental angles which are multiplied by major and minor axis scale factors for a selected ellipse. Global input parameters permit rotation of all arcs and vectors to generate orthogonal projections, thereby producing 2-D and 3-D symbology.

Growing community of inventors

Albuquerque, NM, United States of America

Thomas A Weingartner