Stmicroelectronics (Grenoble 2) Sas

Stmicroelectronics (Alps) Sas

E2v Semiconductors

Atmel Grenoble S.a.

Atmel Grenoble

Thierry Masson

Pawel Fiedorow

Serge Pontarollo

Marc Sabut

Sandrine Nicolas

Colette Morche

Emmanuel Allier

Laurent Espuno

Sébastien Lebreton

Michel Durr

Fabrice Salvi

Jean-François Debroux

Isabelle Icord

Matthieu Desvergne

Pierre-Adrien Pinoncely

Pierre Coquille

In an embodiment a switch includes a first MOS transistor having its source connected to its channel-forming region and coupled with a first terminal of the switch, its drain coupled with a second terminal of the switch, and its gate connected to a first node of the switch, a diode coupling the first terminal with the first node, a capacitive element coupling a third terminal of the switch with the first node, the third terminal being configured to receive a control signal for the switch and a discharge circuit coupling the first node with the first terminal, the discharge circuit configured to conduct only when a voltage between the first node and the first terminal is greater than or equal to a threshold.

Switch and sampling circuit

An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.

Bidirectional analog multiplexer

A circuit includes a Wheatstone bridge and a correction circuit operable to correct an output voltage offset of the Wheatstone bridge. The correction circuit includes a supply module configured to supply the Wheatstone bridge with a voltage and output a first current applied to the Wheatstone bridge and output a second current proportional to the first current. A digital/analog current converter outputs a correction current to the outputs of the Wheatstone bridge circuit in response to a digital correction signal and the second current.

Device for correcting the voltage offset of a wheatstone bridge

A switching circuit a multiplexer includes an NMOS switch module and a PMOS switch module connected in parallel between an input and an output. A first control module powered from a first power supply voltage operates to reduce leakage currents of the NMOS switching module when in the non-conducting state. A second control module powered from a second power supply voltage operates to reduce leakage currents of the PMOS switching module when in the non-conducting state. A voltage selection circuit is configured to deliver a voltage as the second power supply voltage equal to the greater of the first power supply voltage and the voltages present at the input and at the output.

Analog multiplexer

A receiver circuit for a differential input signal, may include a divider bridge having first and second ends, a midpoint therebetween, and intermediate points on either side of the midpoint. The divider bridge is coupled to receive the differential input signal at the first and second ends. A current generator is coupled to the divider bridge and configured to generate compensation currents associated respectively with components of the differential input signal. The divider bridge is configured to receive the compensation currents respectively at the intermediate points, and generate a compensated differential signal between the intermediate points.

Low-voltage differential signal receiver circuitry

The invention relates to circuits for managing differential voltages in series. To individually control the differential voltages of voltage sources in series, there is provided an integrated control circuit for a set of N sources in series. This circuit comprises N discharge control and measurement cells which are each produced in a separate well, insulated from the substrate and from the other wells. The cells are linked to the circuits formed in the substrate by level translation circuits having a part inside the well and a part outside the well. These circuits use transistors withstanding voltages of several tens of volts. The integrated circuits may be cascaded on an SPI bus if one wishes to control a group of k.N sources with k&#x3e;1.

Circuit for measuring and controlling differential voltages

The invention relates to electronic circuits for measuring, by synchronous detection, weak signals whose reference level is not well known and is subject to large fluctuations. A first correlated double sampling is performed between a time Tsituated just before the start of the measurement pulse and a time Tsituated just before the end of the measurement pulse; subsequently, a second correlated double sampling is performed between time Tand a time Tsituated after the end of the measurement pulse. Finally, the difference between signal levels coming from the two measurements is taken, this difference being a representation of the signal value Vm considered with respect to a reference level that is intermediate between the reference levels at times Tand T

Method and device for measuring with synchronous detection and correlated sampling

A digital-analog current converter receives, at input, a succession of bits of a binary signal and delivers, at output, sampled by a clock signal, a positive or negative current depending on the state of the input bit. The converter comprises at least one circuit to control the build-up time of the output current of the converter, comprising a capacitor and a circuit to charge this capacitor controlled by the clock signal. The build-up time is controlled by the charging of a capacitor at a constant current up to a reference voltage. The circuit to control the build-up time of the output current may comprise at least two reference voltages, the capacitor being charged and then discharged between these two voltages. The build-up time of the output current is then the sum of the time taken to charge the capacitor and the time taken to discharge the capacitor. The charging and discharging current of the capacitor can be sent directly into the output load of the converter by means of selector switches and current mirrors. Two capacitors are used and are they are charged and discharged. While one of the capacitors gets charged, the other gets discharged. The disclosure can be applied especially to sigma-delta type digital-analog converters.

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Varces, France

Thierry Masson