Stmicroelectronics S.a.

Stmicroelectronics (Crolles 2) Sas

Thierry Devoivre

François Roy

Philippe Candelier

François Jacquet

Emmanuel Josse

Yann Marcellier

Sébastien Lefebvre

A non-volatile memory element includes a transistor for selecting the element and a capacitor for recording a binary value by electrical breakdown of an insulating layer () of the capacitor. A structure of the memory element is modified in order to allow a higher degree of integration of the element within an electronic circuit of the MOS type. In addition, the memory element is made more robust with respect to a high electrical voltage (VDD) used for recording the binary value. The transistor includes a drain in the substrate with electric field drift in a longitudinal direction extending towards the capacitor. The electric field drift region for the drain includes a first extension underneath the gate of the transistor opposite the source and a second extension underneath the insulating layer of the capacitor. Doping of the substrate for the electric field drift region is limited to a region substantially corresponding to a distance between the gate and an electrode of the capacitor.

Integrated electronic circuit incorporating a capacitor

A content addressable memory (CAM) includes first and second memory circuits and a comparison circuit. The first memory circuit includes first and second sets of transistors for the storage of first and second compare data. The second memory circuit includes first and second sets of transistors for the storage of enabling or disabling data. The comparison circuit includes first and second sets of comparison transistors which respectively provide for the comparison of the first and second compare data with first and second input data under the control of an output signal from the second memory circuit. The transistors of the first and second sets of transistors of the memory circuits each includes a transistor of a first conductivity type and a transistor of a second conductivity type. The transistors of the second conductivity type are formed on the same first active zone of the semiconductor substrate. The first and second sets of comparison transistors of the comparison circuit are formed in separate active zones, respectively, which are mutually separated by the first active zone.

CAM cells and CAM matrix made up of a network of such memory cells

A photocell having an entry face for the light and a photosensitive element, as well as to a matrix composed of such photocells. A lightguide-forming element placed between the entry face and the photosensitive element of the photocell ensures optical coupling between the latter two components. It makes it possible to place on either side of the photosensitive element electronic components for reading and for controlling the photocell, while reducing the loss of light incident on the entry face corresponding to the rays which would strike these electronic components. This lightguide-forming element is composed of at least three dielectric materials having different respective optical refractive indices and placed within concentric volumes.

Photocell incorporating a lightguide and matrix composed of such photocells

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Gieres, France

Thierry Devoivre