International Business Machines Corporation

Cortina Systems Corporation

Theron Paul Niederer

Michael Raymond Trombley

William Robert Lee

Aws Shallal

Juan-Carlos Calderon

Jean-Michel Caia

David Carl Frank

Raj Kumar Singh

Arun Zarabi

Signal format conversion apparatus and methods involve converting data signals between a first signal format associated with a first reference clock rate and a second signal format that is different from the first signal format and is associated with a second reference clock rate different from the first reference clock rate. A period of the second signal format is changed to match a period of a third signal format by controlling a synchronized second reference clock rate that is applied in converting data signals between the first signal format and the second signal format. The synchronized second reference clock rate is different from the second reference clock rate and is synchronized with a third reference clock rate. The third reference clock rate is associated with the third signal format. Such synchronization simplifies conversion of signals between the second and third signal formats.

Signal format conversion apparatus and methods

A system, method and computer program features of the present invention, relate to verification or simulation of a design using a behavioral model structure for use in a Client/Server configuration. A physical part presents the external interface, and a functional procedural part which is comprised of at least one VHDL process. A testcase is a set of procedure calls written in VHDL. The present invention describes the architecture and implementation of a client/server behavioral model and procedural approach for testcase development which results in significant gain in productivity, quality of logic verification, and portability.

Client/server behavioral modeling and testcase development using VHDL for improved logic verification

A video register interface for a video processor in which each frame register has a first storage element which is written by a microprocessor interface independently from a second storage element which outputs control data to video processing circuitry. Since reading and writing are done independently to different storage elements, the contents of the register can be changed without adverse effects on a displayed image. The register interface is used in a CMOS video processor which in turn is used in a microprocessor based multimedia computing system.

Frame register switching for a video processor

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Raleigh, NC, United States of America

Theron Paul Niederer