International Business Machines Corporation

Theodore M Levin

David P Vallett

Timothy Dooling Sullivan

Christopher David Muzzy

Tom C Lee

Fen Chen

Richard Steven Kontra

Leah M Pastel

Philip V Kaszuba

Kevin L Condon

David E Lackey

Leah M P Pastel

A method for changing reflectance or resistance of a region in an optoelectronic memory device. Changing the reflectance of the region includes sending an electric current through the region to cause a reflectance change in the region. Changing the resistance of the region includes: projecting a laser beam at a first beam intensity on the region, resulting in the region changing from a first to a second different resistance value; electrically reading the second resistance value during which an optical signal carried by the laser beam has a first digital value; after electrically reading the second resistance value, the laser beam is projected at a second beam intensity on the region resulting in the region changing from the second to the first resistance value; and electrically reading the first resistance value of the region while the laser beam is being projected on the region at the second beam intensity.

Method of changing reflectance or resistance of a region in an optoelectronic memory device

A structure. The structure includes a substrate, a resistive/reflective region on the substrate, and a light source/light detecting and/or a sens-amp circuit configured to ascertain a reflectance and/or resistance change in the resistive/reflective region. The resistive/reflective region includes a material having a characteristic of the material's reflectance and/or resistance being changed due to a phase change in the material. The resistive/reflective region is configured to respond, to an electric current through the resistive/reflective region and/or a laser beam projected on the resistive/reflective region, by the phase change in the material which causes a reflectance and/resistance change in the resistive/reflective region from a first reflectance and/or resistance value to a second reflectance and/or resistance value different from the first reflectance and/or resistance value.

Optoelectronic memory devices

A structure and a method for operating the same. The method comprises providing a resistive/reflective region on a substrate, wherein the resistive/reflective region comprises a material having a characteristic of changing the material's reflectance due to the material absorbing heat; sending an electric current through the resistive/reflective region so as to cause a reflectance change in the resistive/reflective region from a first reflectance value to a second reflectance value different from the first reflectance value; and optically reading the reflectance change in the resistive/reflective region.

Disclosed is a fault isolation and measurement system that provides multiple near-field scanning isolation techniques on a common platform. The system incorporates the use of a specialized holder to supply electrical bias to internal circuit structures located within an area of a device or material. The system further uses a multi-probe assembly. Each probe is mounted to a support structure around a common reference point and is a component of a different measurement or fault isolation tool. The assembly moves such that each probe can obtain measurements from the same fixed location on the device or material. The relative positioning of the support structure and/or the holder can be changed in order to obtain measurements from multiple same fixed locations within the area. Additionally, the system uses a processor for providing layered images associated with each signal and for precisely aligning those images with design data in order to characterize, or isolate fault locations within the device or material.

Nanoscale fault isolation and measurement system

Disclosed is an apparatus and method for diagnostically testing circuitry within a device. The apparatus and method incorporate the use of energy (e.g., light, heat, magnetic, electric, etc.) applied directly to any location on the device that can affect the electrical activity within the circuitry being tested in order to produce an indicator of a response. A local sensor (e.g., photonic, magnetic, etc.) is positioned at another location on the device where the sensor can detect the indicator of the response within the circuitry. A correlator is configured with response location correlation software and/or circuit tracing software so that when the indicator is detected, the correlator can determine the exact location of a response causing a device failure and/or trace the connectivity of the circuitry, based upon the location of the energy source and the location of the sensor.

Sensor differentiated fault isolation

An apparatus and a method for testing semiconductor devices, such as individual integrated circuits in semiconductor chips, by directing a current in each circuit through a respective selected predetermined path to establish, in each circuit, a respective focused magnetic field and converting each such magnetic field into a respective voltage which, when fed to respective amplifier gated with a respective selected frequency, will modulate each such respective voltage. Each such respective voltage is then used to create a respective pulsating magnetic field that when detected by a respective remote magnetic sensor will provide a series of respective signals representative of the current in the respective circuit from which the pulsating magnetic field was derived. By applying each such series of voltages to a lock-in amplifier synchronized at the respective frequencies gating each respective amplifier the current in each circuit being tested can be accurately determined and will be free of errors due to circuit noise or crosstalk between the circuits under test.

Apparatus and method for transmission and remote sensing of signals from integrated circuit devices

An apparatus for assisting backside focused ion beam (FIB) device modification is disclosed. The apparatus for assisting backside FIB device modification includes an FIB device modification circuit and a control circuit. The FIB device modification circuit includes an input, an output, an FIB input pad, and an FIB output pad. The FIB device modification circuit allows the input to be electrically connected to the output. The control circuit, which is coupled to the FIB device modification circuit, may include a jumper and a cut. The control circuit is preferably located in a proximity of a backside of a substrate to allow the jumper and the cut to be modified by an FIB machine.

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Burlington, VT, United States of America

Theodore M Levin