Owens-illinois, Inc.

Theodore C Baker

James F Nolan

Wolfgang W Bode

Lawrence V Pfaender

Richard G Mathias

William E Johnson

A driving and addressing circuit for applying sustaining, writing and erasing voltages to the cells of a multicelled gas discharge display/memory panel. The voltage generating circuitry is isolated from each panel electrode by a pair of oppositely poled diodes individual to that electrode. The diodes provide low impedance paths for the sustainer current and isolate the electrodes from each other. The writing and erasing voltages are coupled to the electrodes through a plurality of complementary MOSFETs, one per electrode, which eliminate all but one of the diode switch circuits per electrode array of the prior art circuitry. The P-channel and N-channel MOSFETs can be formed on separate integrated circuit chips with one of the pair of the diodes while the other diodes are formed on common anode and common cathode integrated circuit chips. In addition, a portion of the addressing circuitry can be formed on the MOSFET chips. Such a circuit configuration substantially reduces the power requirements and circuit complexity.

MOS addressing circuits for display/memory panels

There is disclosed the manufacture and operation of a gas discharge display/memory panel having a pair of opposed support members carrying conductor arrays with an inorganic dielectric coating on the conductor arrays, and an ionizable gas confined between the opposed dielectric surfaces of the substrate.

Assembly and sealing of gas discharge panel

There is disclosed a gas discharge display/member panel comprising opposed dielectric charge storage members backed by conductor electrode members and having an ionizable gas confined within the space between the opposed dielectric members, the conductor members being specific standardized visual shapes so as to form upon gas discharge alpha-numeric and other selected forms and shapes.

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Toledo, OH, United States of America

Theodore C Baker