Tellabs Operations, Inc.

Thayl Zohner

Lawrence D Weizeorick

David George Rancich

Adam Goldstein

Jae-Hu Kim

Douglas A Chandler

Keith M Ellens

A network method and apparatus configured to increase bandwidth efficiency using multiple packets cells ('MPC') is disclosed. MPC, in one embodiment, includes a header, a payload, a first cell packet indicator ('CPI') and a second CPI. The first CPI includes a first start of packet (&#x201c;SOP&#x201d;) field, a first end of packet (&#x201c;EOP&#x201d;) field, and a first length field. The first SOP field is used to indicate that the payload contains the first portion of a first packet and the first EOP field indicates that the payload contains the last portion of the first packet. The first length field indicates total number of bytes associated with the first packet that are stored in the payload. Similarly, the second CPI includes a second SOP field, a second EOP field, and a second length field, and it is used to track the second packet.

Methods and apparatus for mapping data packets to a multi-packets cell

An embodiment of the invention discloses phase shifting a second clock signal by a phase increment with respect to a first clock signal, where the first clock signal and the second clock signal have the same periods. The first clock signal is sampled with the second clock signal, and the output of the sample indicates whether the sample of the first clock signal is at a logic one state or a logic zero state. A count of logic one samples is incremented if the sample of the first clock signal is at a logic one state. The process of phase shifting the second clock signal and sampling the first clock signal is repetitively performed to a maximum number of samples.

Method and apparatus for determining duty cycle of a clock in a circuit using a configurable phase locked loop

A multiprocessing apparatus includes a memory and a plurality (M) of processors coupled to share the memory. Access to the memory is time-division multiplexed among the plurality of processors. In one embodiment, a selected processor retrieves M words of instruction forming K instructions during a given clock cycle. The selected processor executes M&#x2212;K NOP instructions if K&#x3c;M.

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Naperville, IL, United States of America

Thayl Zohner