Growing community of inventors

Portland, OR, United States of America

Thaddeus Clay McCracken

Average Co-Inventor Count = 1.89

ph-index = 5

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 59

Thaddeus Clay McCrackenMiles P McGowan (6 patents)Thaddeus Clay McCrackenJoseph P Jarosz (5 patents)Thaddeus Clay McCrackenPatrick John Eichenseer (2 patents)Thaddeus Clay McCrackenPing-Chih Wu (2 patents)Thaddeus Clay McCrackenKit Lam Cheong (2 patents)Thaddeus Clay McCrackenJong-Chang Lee (2 patents)Thaddeus Clay McCrackenCecile Nghiem (2 patents)Thaddeus Clay McCrackenJeffrey Kim Ng (1 patent)Thaddeus Clay McCrackenTimothy P Moore (1 patent)Thaddeus Clay McCrackenThaddeus Clay McCracken (15 patents)Miles P McGowanMiles P McGowan (6 patents)Joseph P JaroszJoseph P Jarosz (6 patents)Patrick John EichenseerPatrick John Eichenseer (6 patents)Ping-Chih WuPing-Chih Wu (6 patents)Kit Lam CheongKit Lam Cheong (4 patents)Jong-Chang LeeJong-Chang Lee (2 patents)Cecile NghiemCecile Nghiem (2 patents)Jeffrey Kim NgJeffrey Kim Ng (3 patents)Timothy P MooreTimothy P Moore (2 patents)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Cadence Design Systems, Inc. (15 from 2,545 patents)


15 patents:

1. 9141743 - Methods, systems, and articles of manufacture for providing evolving information in generating a physical design with custom connectivity using force models and design space decomposition

2. 9135373 - Method and system for implementing an interface for I/O rings

3. 9098667 - Methods, systems, and articles of manufacture for implementing physical designs with force directed placement or floorplanning and layout decomposition

4. 9043742 - Methods, systems, and articles of manufacture for implementing physical design using force models with custom connectivity

5. 8918751 - Methods, systems, and articles of manufacture for implementing physical design decomposition with custom connectivity

6. 8683412 - Method and system for optimizing placement of I/O element nodes of an I/O ring for an electronic design

7. 8677307 - Method and system for implementing die size adjustment and visualization

8. 8549457 - Method and system for implementing core placement

9. 8516433 - Method and system for mapping memory when selecting an electronic product

10. 8443323 - Method and system for implementing a structure to implement I/O rings and die area estimations

11. 8386981 - Method and systems for implementing I/O rings and die area estimations

12. 8375344 - Method and system for determining configurations

13. 8261215 - Method and system for performing cell modeling and selection

14. 8051397 - Method and system for conducting design explorations of an integrated circuit

15. 7603643 - Method and system for conducting design explorations of an integrated circuit

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as of
12/29/2025
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