Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Other

Matsushita Electronics Corporation

Cbl Technologies, Inc.

Tetsuzo Ueda

Masahiro Hikita

Tsuyoshi Tanaka

Daisuke Ueda

Yasuhiro Uemoto

Masaaki Yuri

Manabu Yanagihara

Glenn S Solomon

David J Miller

Hidetoshi Ishida

Satoshi Nakazawa

Kenichiro Tanaka

Satoshi Tamura

Hidekazu Umeda

Toshiyuki Takizawa

Tatsuo Morita

Masahiro Ishida

Masayuki Kuroda

Hiroaki Ueno

Daisuke Shibata

Yoshiharu Anda

Takaaki Baba

Ryo Kajitani

Hisashi Nakayama

Toshikazu Onishi

Kazutoshi Onozawa

Yusuke Kinoshita

Tomohiro Murata

Hisayoshi Matsuo

Hideo Nagai

Yutaka Hirose

Kenji Orita

Naohiro Tsurumi

Jun Shimizu

Kazuhiro Kaibara

Manabu Usuda

Kazushi Nakazawa

Tatsuya Tanigawa

Ryosuke Usui

Shuichi Nagai

Hiroyuki Handa

Hiroshi Ohno

Shinichi Kohda

Seiichiro Tamai

Noboru Negoro

Nanako Hirashita

Yasuyuki Fukushima

Hisanori Ishiguro

Hideho Nagai

A field effect transistor having a reduced sheet resistance is provided. A channel layer, a first spacer layer, a second spacer layer, a first electronic barrier layer, and a second electronic barrier layer are sequentially grown on the main surface of a substrate. A gate recess is created, and then an ion implanted section is formed. A third electronic barrier layer and a p-type layer are formed by a metalorganic chemical vapor deposition (MOCVD) method. The p-type layer except a portion at the gate recess is removed. B ions are implanted in the regrown third electronic barrier layer to reform the ion implanted section. A source electrode and a drain electrode are formed on the third electronic barrier layer. Then a gate electrode is formed on the p-type layer.

Field effect transistor

A semiconductor device includes a semiconductor module including a semiconductor element, a passive element, a cooling member, a first conductive member and a second conductive member. The cooling member is disposed between the semiconductor module and the passive element. And a first conductive member and a second conductive member electrically connect the semiconductor module and the passive element. Furthermore, two or more aspects of at least one of the first conductive member and the second conductive member face the cooling member.

Semiconductor device

A nitride semiconductor device includes: a substrate having a first major surface and a second major surface; a first nitride semiconductor layer of an n-type which is disposed on the first major surface and has a protrusion; a second nitride semiconductor layer of a p-type disposed on the protrusion; a first anode electrode disposed above the first nitride semiconductor layer and the second nitride semiconductor layer; and a cathode electrode disposed under the second major surface, and a lateral surface of the protrusion is inclined by a first angle with respect to the first major surface.

Nitride semiconductor device

A nitride semiconductor device includes: a substrate of a first conductivity type having a first surface and a second surface on a side of the substrate opposite the first surface; a first nitride semiconductor layer of the first conductivity type which is disposed on the first surface of the substrate and includes an acceptor impurity; a second nitride semiconductor layer of a second conductivity type disposed on the first nitride semiconductor layer, the second conductivity type being opposite to the first conductivity type; a first electrode disposed on the second surface of the substrate; a second electrode disposed on the first nitride semiconductor layer; and a gate electrode disposed on the second nitride semiconductor layer.

Provided is a field-effect transistor (FET) that achieves compatibility between a higher current density and lower contact resistance and exhibits excellent properties, and a method for producing the FET. The FET includes: a channel layer above a substrate; an InAlN layer above the channel layer; an InAlGaN layer on the InAlN layer, where 0&#x3c;x&#x3c;1, 0&#x3c;y&#x3c;1, and x+y&#x3c;1; and a source electrode and a drain electrode formed on the InAlGaN layer.

A semiconductor device includes: a channel layer made of GaN; a barrier layer formed on the channel layer, the bather layer being made of AlGaN and having a larger band gap than the channel layer; a p-type GaN layer selectively formed on the barrier layer; a gate electrode made of ITO on the p-type GaN layer; and a source electrode and a drain electrode on regions of the barrier layer laterally outward of the gate electrode. The width of the gate electrode in the gate length direction is smaller than or equal to the width of the p-type GaN layer in the gate length direction, and the difference between the width of the gate electrode in the gate length direction and the width of the p-type GaN layer in the gate length direction is less than or equal to 0.2 &#x3bc;m.

Semiconductor device and method for fabricating the same

A semiconductor device includes: a channel layer which is made of InAlGaN (0&#x2266;p+q&#x2266;1, 0&#x2266;p, and 0&#x2266;q); a barrier layer which is formed on the channel layer and is made of InAlGaN (0&#x2266;r+s&#x2266;1, 0&#x2266;r) having a bandgap larger than that of the channel layer; a diffusion suppression layer which is selectively formed on the barrier layer and is made of InAlGaN (0&#x2266;t+u&#x2266;1, 0&#x2266;t, and s&#x3e;u); a p-type conductive layer which is formed on the diffusion suppression layer and is made of InAlGaN (0&#x2266;x+y&#x2266;1, 0&#x2266;x, and 0&#x2266;y) having p-type conductivity; and a gate electrode which is formed on the p-type conductive layer.

Semiconductor device and method for manufacturing same

An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

A field-effect transistor includes a codoped layer made of AlGaN (0&#x2266;x&#x2266;1) and formed on a p-type Si substrate, a GaN layer formed on the codoped layer, and an AlGaN layer formed on the GaN layer. The codoped layer contains C and Si as impurity elements. The impurity concentration of C in the codoped layer is equal to or higher than 5&#xd7;10/cm. The impurity concentration of Si in the codoped layer is lower than the impurity concentration of C. The impurity concentration of C in the GaN layer is equal to or lower than 1&#xd7;10/cm. The thickness of the GaN layer is equal to or greater than 0.75 &#x3bc;m.

Field-effect transistor

A semiconductor apparatus includes a substrate; a nitride semiconductor layer formed on the substrate; a transistor formed on the nitride semiconductor layer, and including a source electrode, a gate electrode, and a drain electrode disposed in this order; and a diode formed on the nitride semiconductor layer, and including an anode electrode and a cathode electrode disposed in this order. The semiconductor apparatus has a transistor/diode pair in which the source electrode, the gate electrode, the drain electrode, the anode electrode, and the cathode electrode are sequentially disposed in this order, and the drain electrode of the transistor and the anode electrode of the diode are connected by a drain/anode common electrode wiring and serve as a common electrode.

Semiconductor apparatus

A power semiconductor element includes: a main transistor including a first gate electrode, a first drain electrode, and a first source electrode; a sensor transistor including a second gate electrode, a second drain electrode, and a second source electrode; and a gate switch transistor including a third gate electrode, and a third drain electrode, a third source electrode. The first gate electrode, the second gate electrode, and the third drain electrode are connected, the first drain electrode and the second drain electrode are connected, the first source electrode and the second source electrode are connected via a sensor resistor, the first source electrode and the third source electrode are connected, the second source electrode and the third gate electrode are connected via a switch resistor, and the main transistor, the sensor transistor, and the gate switch transistor are formed with a nitride semiconductor.

Power semiconductor element

A nitride semiconductor structure of the present disclosure comprises a semiconductor substrate, and a layer formed over the semiconductor substrate and comprising plural nitride semiconductor layers. The semiconductor substrate has, from a side thereof near the layer comprising the plural nitride semiconductor layers, a surface region and an internal region in this order. The surface region has a resistivity of 0.1 &#x3a9;cm or more, and the internal region has a resistivity of 1000 &#x3a9;cm or more.

Nitride semiconductor structure

A semiconductor device includes a substrate; a carrier traveling layer formed on the substrate, made of first group III nitride semiconductor, and containing carriers traveling in a direction along a principal surface of the substrate; a barrier layer formed on the carrier traveling layer and made of second group III nitride semiconductor having a wider band gap than the first group III nitride semiconductor; and an electrode formed on the barrier layer. The device further includes a cap layer formed on the barrier layer at a side of the electrode, and made of third group III nitride semiconductor containing a mixture of single crystals and polycrystals.

Semiconductor device and method of manufacturing the device

A semiconductor device includes a field effect transistor that has a first nitride semiconductor layer and a second nitride semiconductor layer larger in bandgap than the first nitride semiconductor layer formed on a substrate in this order and a gate electrode, a source electrode, and a drain electrode, and uses two-dimensional electron gas formed at the interface between the first and second nitride semiconductor layers as the channel. The field effect transistor further has a p-type nitride semiconductor layer formed between the gate electrode and the drain electrode and electrically connected to the drain electrode.

A field effect transistor includes a nitride semiconductor multilayer structure formed on a substrate, a source electrode, a drain electrode, a gate electrode, an insulating film formed on the nitride semiconductor multilayer structure, and a field plate formed on and in contact with the insulating film, and having an end located between the gate electrode and the drain electrode. The insulating film includes a first film, and a second film having a dielectric breakdown voltage lower than that of the first film, and a thin film portion formed between the gate electrode and the drain electrode is formed in the insulating film. The field plate covers the thin film portion, and is connected to the source electrode in an opening.

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Osaka, Japan

Tetsuzo Ueda