Hitachi, Ltd.

Renesas Technology Corp.

Tetsuya Yamato

Hiroshi Yamada

Norihiko Sugita

Toyokazu Hori

Masaru Hase

A bus arbitration apparatus for an image processing processor is operable such that when a channel having a high necessity of a real-time processing operation issues a bus use request, a bus use permission is not given to another channel having a low necessity of a real-time processing operation. The bus arbitrator of the data includes a timer for counting down use permission time with respect to the channel having the high necessity of the real-time processing operation, and a register for the channel having the low necessity of the real-time processing operation. A value larger than a maximum value of the timer is set to the value of the register. In the bus arbitration, the value of the register is compared with that of the timer, and then the bus use permission is given to a channel having the small value.

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Tachikawa, Japan

Tetsuya Yamato