Sanyo Electric Co., Ltd.

Semiconductor Components Industries, LLC

Sanyo Semiconductor Co., Ltd.

Tetsuya Tokunaga

Hiroyuki Arai

Takeshi Kimura

Kensuke Goto

Yasuo Osawa

Yoshiyuki Yamagata

Shuji Motegi

Syuji Motegi

Takayasu Otagaki

Mamoru Yamaguchi

Norikazu Katagiri

Takeshi Hibino

Toshiyuki Ozawa

Kazuyoshi Ishikawa

Yasunori Yamamoto

Tomoshi Yoshida

Stephen John Sheard

Hiroshi Yoshino

Hiroyuki Nakamura

Ryouichi Ando

Various embodiments of the present technology may provide methods and system for a capacitive touch sensor. The system is configured to measure a capacitance of a capacitive sensor element and generate a corresponding voltage using a sensing circuit. The sensing circuit may include an amplifier configured to generate a plurality of amplified voltages by applying a set of gain values to the voltage. The sensing circuit may further analyze a set of values according to the plurality of the amplified voltages.

Methods and system for a capacitive touch sensor

Various embodiments of the present technology may comprise methods and apparatus for a touch sensor. The capacitive touch sensor may comprise a plurality of drive electrodes and a reception electrode, wherein two capacitors are formed. Under various conditions, the capacitive touch sensor may be configured to trigger a touch event in the presence of a human finger and trigger a non-touch event in the presence of water.

Methods and apparatus for a capacitive touch sensor

In accordance with at least one embodiment, a method for detecting a liquid level includes providing a container () having a cavity, and disposing a sensor () in the cavity of the container (), such that a ground pattern () on a first surface of the sensor () is positioned to contact a liquid in the cavity. A first electrode () and a second electrode () are located on a second surface of the sensor (). The sensor () is coupled to a sensor input and a sensor driver. A cable coupling the sensor () to a touch sensor () comprises a shield line () that is coupled to ground.

Capacitance liquid level sensor

A liquid-crystal-driving circuit includes: a plurality of resistors connected in series between a first and second potentials; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid-crystal panel, respectively, the common signals each being at the first and second potentials, and the intermediate potentials; and a segment-signal-output circuit to supply segment signals to segment electrodes of the panel, respectively, the segment signals each being at the first and second potentials, and the intermediate potentials according to the common signals, the segment-signal output circuit to change the potentials of the segment signals in a ramp form, at least if the potentials of the segment signals are changed with a maximum-possible-potential difference.

Liquid crystal driving circuit having a common-signal output circuit and a segment-signal output circuit and method

A liquid-crystal-driving circuit includes: resistors connected in series between first and second potentials lower than the first potential; one or more voltage follower circuits to impedance-convert one or more intermediate potentials between the first and second potentials, to be outputted, respectively, the intermediate potentials generated at one or more connection points between the resistors, respectively; a common-signal-output circuit to supply common signals to common electrodes of a liquid crystal panel, respectively, the common signals being at the first, second, or one or more intermediate potentials in a predetermined order; and a segment-signal output circuit supplies segment signals to segment electrodes of the liquid crystal panel, respectively, the segment signals being at the first and second potentials, or the intermediate potentials according to the common signals, wherein the segment-signal output circuit increases impedances of the segment signals only for a first period when the of segment signals potentials are switched.

Liquid crystal driving circuit

A data processing circuit comprising: a first circuit configured to time-division-multiplex a first digital signal synchronous with a clock signal input from an external controller and a second digital signal asynchronous with the clock signal; and a second circuit configured to output a digital signal time-division-multiplexed by the first circuit to the controller.

Data processing circuit and data processing method

This invention offers an LCD drive circuit that prevents conversion to a wrong duty driving state and an unintended display caused by taking in of serial data corresponding to the wrong duty driving state. The LCD drive circuit is provided with an LCD drive signal generation circuit that generates driving signals to turn LCD segments on and off based on serial data received by a serial data receiving circuit and is switchable between a &#xbc; duty driving state and a &#x2153; duty driving state. The LCD drive circuit is also provided with a driving state setting circuit that sets the LCD drive signal generation circuit to the &#xbc; duty driving state based on identification data when the serial data receiving circuit receives the serial data corresponding to the &#xbc; duty driving state and thereafter forbids the LCD drive signal generation circuit to take in serial data corresponding to the &#x2153; duty driving state when the serial data receiving circuit receives the serial data corresponding to the &#x2153; duty driving state.

Liquid crystal display drive circuit

A data output circuit includes: a data generating circuit configured to generate output data; and a serial output circuit configured to receive an address corresponding to the data generating circuit, hold a parallel data input during a time period over which the address is being received, and serially output the output data generated by the data generating circuit and the held parallel data in accordance with an output direction signal for directing output of the data.

Data output circuit

This invention offers a data communication system that can perform data communication and detection of a data read-in request signal while reducing the number of communication lines to three, and is tolerant of noise. The data communication between a microcomputer and a key scan IC and the detection of the data read-in request signal are performed through a control line, a clock line and a data line. The data communication system is provided with a data line control circuit that controls the data line so that outputting of the data read-in signal RDRQ to the data line is disabled when first command data is inputted to the key scan IC through the data line, and that the outputting of the data read-in request signal RDRQ to the data line is enabled when second command data is inputted from the microcomputer to the key scan IC through the data line.

Noise-tolerant data communication system

Increase in power consumption and increase in power supply noise of a serial data input system are suppressed, while clock skew is more easily prevented. The serial data input system of this invention includes a shift register that takes in and shifts serially transferred display data in synchronization with a clock SCL, a clock counter that counts the number of clock pulses of the clock SCL and outputs each of clock count signals BIT, BITand BITwhen the counted number of the clock pulses of the clock SCL reaches each of count numbersandrespectively, and registers into each of which the data stored in the shift register is transferred and stored collectively and in parallel in response to each of the clock count signals BIT, BIPand BITrespectively.

Serial data input system

An interface circuit outputting a clock signal and data to a data register configured to serially read in the data synchronously with the clock signal, in response to a change of a control signal for outputting the clock signal and the data from one logic level to the other logic level, the interface circuit comprising a clock output circuit configured to: detect a logic level of the clock signal when the control signal changes from the one logic level to the other logic level; output the clock signal on an as-is basis to the data register, when detecting one logic level of the clock signal; and output the clock signal after having changed from the other logic level to the one logic level, to the data register, when detecting the other logic level of the clock signal.

Interface circuit and a clock output method therefor

A serial-to-parallel converter circuit comprising: an m-bit serial data holding unit to be input with serial data whose input bit number is set to m or n (&#x3c;m) bits within a transfer period and a serial clock synchronized therewith, and to shift and hold the serial data by one bit based on the serial clock; an input mode identifying unit to identify whether the input bit number is m or n bits, based on a count value obtained by counting the number of generation of the serial clock during the transfer period; and a parallel data generating unit to output the held m-bit data as first parallel data when the input bit number is identified as m bits, and to output m-bit data obtained by adding predetermined (m&#x2212;n)-bit data to the held n-bit data as second parallel data when the input bit number is identified as n bits.

Serial-to-parallel converter circuit and liquid crystal display driving circuit

A driving circuit for a vacuum fluorescent display having a filament, a grid electrode and a segment electrode, the driving circuit comprising a filament driving unit for driving the filament; a grid driving unit for pulse-driving the grid electrode; and a segment driving unit for pulse-driving the segment electrode, wherein the driving circuit comprises a controlling unit for validating or invalidating the output of the filament driving unit at a proper timing.

Driving circuit for vacuum fluorescent display

A driving circuit for a vacuum fluorescent display for pulse-driving a filament of the vacuum fluorescent display with a pulse voltage. The driving circuit comprises a detecting unit for detecting that the level of the pulse voltage is fixed, and outputs a detection signal indicative of the result of the detection. Preferably, the driving circuit comprises a control unit for controlling at least one output of the outputs of the filament driving unit, the grid driving unit and the segment driving unit in order to terminate the driving of at least one of the filament, the grid electrode and the segment electrode, based on the detection signal.

A driving circuit for a vacuum fluorescent display having a filament, a grid electrode and a segment electrode, comprising a grid driving unit for pulse-driving the grid electrode, a segment driving unit for pulse-driving the segment electrode, a first controlling unit for rendering adjustable the duty ratio of the output of the grid driving unit, a second controlling unit for rendering adjustable the duty ratio of the output of the segment driving unit, and a selecting unit for selecting the first controlling unit and/or the second controlling unit.

Growing community of inventors

Gunma, Japan

Tetsuya Tokunaga